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Searched refs:MSTP015 (Results 1 – 6 of 6) sorted by relevance

/arch/arm/mach-shmobile/
Dclock-r8a7778.c63 MSTP016, MSTP015, enumerator
75 [MSTP015] = SH_CLK_MSTP32(&clkp, MSTPCR0, 15, 0), /* TMU1 */
88 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
Dclock-r8a7779.c119 MSTP016, MSTP015, MSTP014, enumerator
144 [MSTP015] = SH_CLK_MSTP32(&clkp_clk, MSTPCR0, 15, 0), /* TMU1 */
/arch/sh/kernel/cpu/sh4a/
Dclock-sh7734.c94 MSTP016, MSTP015, MSTP014, /* TMU / TIMER */ enumerator
139 [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
207 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP015]),
208 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP015]),
209 CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP015]),
Dclock-sh7786.c87 MSTP015, MSTP014, MSTP011, MSTP010, MSTP009, MSTP008, enumerator
107 [MSTP015] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
155 CLKDEV_CON_ID("i2c1_fck", &mstp_clks[MSTP015]),
Dclock-sh7366.c145 MSTP015, MSTP014, MSTP013, MSTP012, MSTP011, MSTP010, enumerator
165 [MSTP015] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
227 CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),
Dclock-sh7343.c142 MSTP015, MSTP014, MSTP013, MSTP012, MSTP011, MSTP010, enumerator
162 [MSTP015] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
229 CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),