Searched refs:MX27_IO_ADDRESS (Results 1 – 7 of 7) sorted by relevance
69 mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR)); in imx27_init_early()70 imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR), in imx27_init_early()76 mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); in mx27_init_irq()
22 cscr = __raw_readl(MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); in mx27_suspend_enter()24 __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); in mx27_suspend_enter()
42 v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); in mx27_initialize_usb_hw()78 writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); in mx27_initialize_usb_hw()
42 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR in mx27_read_cpu_rev()
179 __raw_writel(0x0000d843, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(1))); in pcm038_init_sram()180 __raw_writel(0x22252521, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(1))); in pcm038_init_sram()181 __raw_writel(0x22220a00, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(1))); in pcm038_init_sram()
128 #define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x)) macro
13 #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))291 mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1); in mx27_clocks_init()