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Searched refs:MX35_CCM_CGR1 (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-imx/
Dclk-imx35.c164 clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", base + MX35_CCM_CGR1, 0); in mx35_clocks_init()
165 clk[gpio1_gate] = imx_clk_gate2("gpio1_gate", "ipg", base + MX35_CCM_CGR1, 2); in mx35_clocks_init()
166 clk[gpio2_gate] = imx_clk_gate2("gpio2_gate", "ipg", base + MX35_CCM_CGR1, 4); in mx35_clocks_init()
167 clk[gpio3_gate] = imx_clk_gate2("gpio3_gate", "ipg", base + MX35_CCM_CGR1, 6); in mx35_clocks_init()
168 clk[gpt_gate] = imx_clk_gate2("gpt_gate", "ipg", base + MX35_CCM_CGR1, 8); in mx35_clocks_init()
169 clk[i2c1_gate] = imx_clk_gate2("i2c1_gate", "ipg_per", base + MX35_CCM_CGR1, 10); in mx35_clocks_init()
170 clk[i2c2_gate] = imx_clk_gate2("i2c2_gate", "ipg_per", base + MX35_CCM_CGR1, 12); in mx35_clocks_init()
171 clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "ipg_per", base + MX35_CCM_CGR1, 14); in mx35_clocks_init()
172 clk[iomuxc_gate] = imx_clk_gate2("iomuxc_gate", "ipg", base + MX35_CCM_CGR1, 16); in mx35_clocks_init()
173 clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MX35_CCM_CGR1, 18); in mx35_clocks_init()
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Dcrmregs-imx3.h51 #define MX35_CCM_CGR1 0x30 macro