Searched refs:OMAP2_RM_RSTCTRL (Results 1 – 6 of 6) sorted by relevance
| /arch/arm/mach-omap2/ |
| D | prm2xxx_3xxx.c | 37 return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, in omap2_prm_is_hardreset_asserted()
58 omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL); in omap2_prm_assert_hardreset()
87 if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0) in omap2_prm_deassert_hardreset()
93 omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL); in omap2_prm_deassert_hardreset()
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| D | prm2xxx.c | 115 OMAP2_RM_RSTCTRL); in omap2xxx_prm_dpll_reset()
117 omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL); in omap2xxx_prm_dpll_reset()
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| D | pm34xx.c | 426 OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL); in omap3_iva_idle()
437 omap2_prm_write_mod_reg(0, OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL); in omap3_iva_idle()
446 OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL); in omap3_iva_idle()
469 CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_d2d_idle()
470 omap2_prm_write_mod_reg(0, CORE_MOD, OMAP2_RM_RSTCTRL); in omap3_d2d_idle()
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| D | prm3xxx.c | 133 OMAP2_RM_RSTCTRL); in omap3xxx_prm_dpll3_reset()
135 omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL); in omap3xxx_prm_dpll3_reset()
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| D | prm2xxx.h | 98 #define OMAP2_RM_RSTCTRL 0x0050 macro
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| D | prm2xxx_3xxx.h | 34 #define OMAP2_RM_RSTCTRL 0x0050 macro
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