1 /*
2 * linux/arch/arm/mach-realview/realview_pba8.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/device.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/amba/pl022.h>
29 #include <linux/io.h>
30 #include <linux/irqchip/arm-gic.h>
31 #include <linux/platform_data/clk-realview.h>
32
33 #include <asm/irq.h>
34 #include <asm/mach-types.h>
35 #include <asm/pgtable.h>
36
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/time.h>
40
41 #include <mach/hardware.h>
42 #include <mach/board-pba8.h>
43 #include <mach/irqs.h>
44
45 #include "core.h"
46
47 static struct map_desc realview_pba8_io_desc[] __initdata = {
48 {
49 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
50 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
61 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
71 .length = SZ_4K,
72 .type = MT_DEVICE,
73 }, {
74 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
76 .length = SZ_4K,
77 .type = MT_DEVICE,
78 },
79 #ifdef CONFIG_PCI
80 {
81 .virtual = PCIX_UNIT_BASE,
82 .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
83 .length = REALVIEW_PBA8_PCI_BASE_SIZE,
84 .type = MT_DEVICE
85 },
86 #endif
87 #ifdef CONFIG_DEBUG_LL
88 {
89 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
90 .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
91 .length = SZ_4K,
92 .type = MT_DEVICE,
93 },
94 #endif
95 };
96
realview_pba8_map_io(void)97 static void __init realview_pba8_map_io(void)
98 {
99 iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
100 }
101
102 static struct pl061_platform_data gpio0_plat_data = {
103 .gpio_base = 0,
104 };
105
106 static struct pl061_platform_data gpio1_plat_data = {
107 .gpio_base = 8,
108 };
109
110 static struct pl061_platform_data gpio2_plat_data = {
111 .gpio_base = 16,
112 };
113
114 static struct pl022_ssp_controller ssp0_plat_data = {
115 .bus_id = 0,
116 .enable_dma = 0,
117 .num_chipselect = 1,
118 };
119
120 /*
121 * RealView PBA8Core AMBA devices
122 */
123
124 #define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
125 #define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
126 #define AACI_IRQ { IRQ_PBA8_AACI }
127 #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
128 #define KMI0_IRQ { IRQ_PBA8_KMI0 }
129 #define KMI1_IRQ { IRQ_PBA8_KMI1 }
130 #define PBA8_SMC_IRQ { }
131 #define MPMC_IRQ { }
132 #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
133 #define DMAC_IRQ { IRQ_PBA8_DMAC }
134 #define SCTL_IRQ { }
135 #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
136 #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
137 #define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
138 #define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
139 #define SCI_IRQ { IRQ_PBA8_SCI }
140 #define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
141 #define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
142 #define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
143 #define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
144 #define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
145
146 /* FPGA Primecells */
147 APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
148 APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
149 APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
150 APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
151 APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
152
153 /* DevChip Primecells */
154 AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
155 AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
156 APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
157 APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
158 APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
159 APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
160 APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
161 APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
162 APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
163 APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
164 APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
165 APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data);
166
167 /* Primecells on the NEC ISSP chip */
168 AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
169 AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
170
171 static struct amba_device *amba_devs[] __initdata = {
172 &dmac_device,
173 &uart0_device,
174 &uart1_device,
175 &uart2_device,
176 &uart3_device,
177 &smc_device,
178 &clcd_device,
179 &sctl_device,
180 &wdog_device,
181 &gpio0_device,
182 &gpio1_device,
183 &gpio2_device,
184 &rtc_device,
185 &sci0_device,
186 &ssp0_device,
187 &aaci_device,
188 &mmc0_device,
189 &kmi0_device,
190 &kmi1_device,
191 };
192
193 /*
194 * RealView PB-A8 platform devices
195 */
196 static struct resource realview_pba8_flash_resource[] = {
197 [0] = {
198 .start = REALVIEW_PBA8_FLASH0_BASE,
199 .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
200 .flags = IORESOURCE_MEM,
201 },
202 [1] = {
203 .start = REALVIEW_PBA8_FLASH1_BASE,
204 .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
205 .flags = IORESOURCE_MEM,
206 },
207 };
208
209 static struct resource realview_pba8_smsc911x_resources[] = {
210 [0] = {
211 .start = REALVIEW_PBA8_ETH_BASE,
212 .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
213 .flags = IORESOURCE_MEM,
214 },
215 [1] = {
216 .start = IRQ_PBA8_ETH,
217 .end = IRQ_PBA8_ETH,
218 .flags = IORESOURCE_IRQ,
219 },
220 };
221
222 static struct resource realview_pba8_isp1761_resources[] = {
223 [0] = {
224 .start = REALVIEW_PBA8_USB_BASE,
225 .end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1,
226 .flags = IORESOURCE_MEM,
227 },
228 [1] = {
229 .start = IRQ_PBA8_USB,
230 .end = IRQ_PBA8_USB,
231 .flags = IORESOURCE_IRQ,
232 },
233 };
234
235 static struct resource pmu_resource = {
236 .start = IRQ_PBA8_PMU,
237 .end = IRQ_PBA8_PMU,
238 .flags = IORESOURCE_IRQ,
239 };
240
241 static struct platform_device pmu_device = {
242 .name = "arm-pmu",
243 .id = -1,
244 .num_resources = 1,
245 .resource = &pmu_resource,
246 };
247
gic_init_irq(void)248 static void __init gic_init_irq(void)
249 {
250 /* ARM PB-A8 on-board GIC */
251 gic_init(0, IRQ_PBA8_GIC_START,
252 __io_address(REALVIEW_PBA8_GIC_DIST_BASE),
253 __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
254 }
255
realview_pba8_timer_init(void)256 static void __init realview_pba8_timer_init(void)
257 {
258 timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
259 timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
260 timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
261 timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
262
263 realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
264 realview_timer_init(IRQ_PBA8_TIMER0_1);
265 }
266
realview_pba8_restart(char mode,const char * cmd)267 static void realview_pba8_restart(char mode, const char *cmd)
268 {
269 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
270 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
271
272 /*
273 * To reset, we hit the on-board reset register
274 * in the system FPGA
275 */
276 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
277 __raw_writel(0x0000, reset_ctrl);
278 __raw_writel(0x0004, reset_ctrl);
279 dsb();
280 }
281
realview_pba8_init(void)282 static void __init realview_pba8_init(void)
283 {
284 int i;
285
286 realview_flash_register(realview_pba8_flash_resource,
287 ARRAY_SIZE(realview_pba8_flash_resource));
288 realview_eth_register(NULL, realview_pba8_smsc911x_resources);
289 platform_device_register(&realview_i2c_device);
290 platform_device_register(&realview_cf_device);
291 realview_usb_register(realview_pba8_isp1761_resources);
292 platform_device_register(&pmu_device);
293
294 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
295 struct amba_device *d = amba_devs[i];
296 amba_device_register(d, &iomem_resource);
297 }
298 }
299
300 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
301 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
302 .atag_offset = 0x100,
303 .fixup = realview_fixup,
304 .map_io = realview_pba8_map_io,
305 .init_early = realview_init_early,
306 .init_irq = gic_init_irq,
307 .init_time = realview_pba8_timer_init,
308 .init_machine = realview_pba8_init,
309 #ifdef CONFIG_ZONE_DMA
310 .dma_zone_size = SZ_256M,
311 #endif
312 .restart = realview_pba8_restart,
313 MACHINE_END
314