| /arch/arm/include/asm/ |
| D | pgtable-2level.h | 71 #define PTRS_PER_PTE 512 macro
75 #define PTE_HWTABLE_PTRS (PTRS_PER_PTE)
77 #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32))
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| D | pgtable-3level.h | 32 #define PTRS_PER_PTE 512 macro
36 #define PTE_HWTABLE_PTRS (PTRS_PER_PTE)
38 #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64))
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| D | highmem.h | 7 #define LAST_PKMAP PTRS_PER_PTE
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| /arch/m68k/include/asm/ |
| D | pgtable_mm.h | 56 #define PTRS_PER_PTE 16 macro
60 #define PTRS_PER_PTE 512 macro
64 #define PTRS_PER_PTE 1024 macro
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| /arch/mips/include/asm/ |
| D | pgtable-64.h | 127 #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) macro
140 min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
159 extern pte_t invalid_pte_table[PTRS_PER_PTE];
160 extern pte_t empty_bad_page_table[PTRS_PER_PTE];
274 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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| /arch/m68k/mm/ |
| D | sun3mmu.c | 68 next_pgtable += PTRS_PER_PTE * sizeof (pte_t); in paging_init()
74 for (i=0; i<PTRS_PER_PTE; ++i, ++pg_table) { in paging_init()
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| D | mcfmmu.c | 61 next_pgtable += PTRS_PER_PTE * sizeof(pte_t); in paging_init()
66 for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) { in paging_init()
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| /arch/hexagon/include/asm/ |
| D | pgtable.h | 99 #define PTRS_PER_PTE 1024 macro
103 #define PTRS_PER_PTE 256 macro
107 #define PTRS_PER_PTE 64 macro
111 #define PTRS_PER_PTE 16 macro
115 #define PTRS_PER_PTE 4 macro
453 #define __pte_offset(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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| D | mem-layout.h | 97 #define LAST_PKMAP PTRS_PER_PTE
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| /arch/tile/include/asm/ |
| D | pgtable_32.h | 37 #define PTRS_PER_PTE _HV_L2_ENTRIES(HPAGE_SHIFT, PAGE_SHIFT) macro
53 #define LAST_PKMAP PTRS_PER_PTE
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| /arch/powerpc/mm/ |
| D | subpage-prot.c | 120 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in subpage_prot_clear()
121 nw = PTRS_PER_PTE - i; in subpage_prot_clear()
199 i = (addr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); in sys_subpage_prot()
200 nw = PTRS_PER_PTE - i; in sys_subpage_prot()
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| /arch/unicore32/include/asm/ |
| D | pgalloc.h | 43 clean_dcache_area(pte, PTRS_PER_PTE * sizeof(pte_t)); in pte_alloc_one_kernel()
57 clean_dcache_area(page, PTRS_PER_PTE * sizeof(pte_t)); in pte_alloc_one()
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| /arch/arm64/include/asm/ |
| D | pgtable-2level-hwdef.h | 26 #define PTRS_PER_PTE 8192 macro
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| D | pgtable-3level-hwdef.h | 25 #define PTRS_PER_PTE 512 macro
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| /arch/x86/include/asm/ |
| D | pgtable-2level_types.h | 35 #define PTRS_PER_PTE 1024 macro
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| D | pgtable-3level_types.h | 45 #define PTRS_PER_PTE 512 macro
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| D | pgtable_64_types.h | 47 #define PTRS_PER_PTE 512 macro
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| /arch/mn10300/mm/ |
| D | init.c | 61 for (loop = VMALLOC_START / (PAGE_SIZE * PTRS_PER_PTE); in paging_init()
62 loop < VMALLOC_END / (PAGE_SIZE * PTRS_PER_PTE); in paging_init()
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| /arch/arc/include/asm/ |
| D | pgalloc.h | 90 return get_order(PTRS_PER_PTE * 4); in __get_order_pte()
111 memzero((void *)pte_pg, PTRS_PER_PTE * 4); in pte_alloc_one()
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| /arch/x86/power/ |
| D | hibernate_32.c | 113 pfn += PTRS_PER_PTE; in resume_physical_mapping_init()
121 max_pte = pte + PTRS_PER_PTE; in resume_physical_mapping_init()
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| /arch/powerpc/include/asm/ |
| D | pgtable-ppc64-64k.h | 18 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) macro
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| /arch/metag/include/asm/ |
| D | highmem.h | 27 #define LAST_PKMAP PTRS_PER_PTE
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| /arch/s390/mm/ |
| D | hugetlbpage.c | 43 for (i = 0; i < PTRS_PER_PTE; i++) { in arch_prepare_hugepage()
62 PTRS_PER_PTE * sizeof(pte_t)); in arch_release_hugepage()
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| /arch/avr32/include/asm/ |
| D | pgtable-2level.h | 19 #define PTRS_PER_PTE 1024 macro
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| /arch/um/include/asm/ |
| D | pgtable-2level.h | 23 #define PTRS_PER_PTE 1024 macro
|