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Searched refs:RE (Results 1 – 15 of 15) sorted by relevance

/arch/x86/crypto/
Dserpent-sse2-i586-asm_32.S46 #define RE %xmm4 macro
528 read_blocks(%eax, RA, RB, RC, RD, RT0, RT1, RE);
530 K(RA, RB, RC, RD, RE, 0);
531 S0(RA, RB, RC, RD, RE); LK(RC, RB, RD, RA, RE, 1);
532 S1(RC, RB, RD, RA, RE); LK(RE, RD, RA, RC, RB, 2);
533 S2(RE, RD, RA, RC, RB); LK(RB, RD, RE, RC, RA, 3);
534 S3(RB, RD, RE, RC, RA); LK(RC, RA, RD, RB, RE, 4);
535 S4(RC, RA, RD, RB, RE); LK(RA, RD, RB, RE, RC, 5);
536 S5(RA, RD, RB, RE, RC); LK(RC, RA, RD, RE, RB, 6);
537 S6(RC, RA, RD, RE, RB); LK(RD, RB, RA, RE, RC, 7);
[all …]
Dserpent-sse2-x86_64-asm_64.S651 K2(RA, RB, RC, RD, RE, 0);
652 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
653 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
654 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
655 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
656 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
657 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
658 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
659 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
660 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
[all …]
Dserpent-avx2-asm_64.S576 K2(RA, RB, RC, RD, RE, 0);
577 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
578 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
579 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
580 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
581 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
582 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
583 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
584 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
585 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
[all …]
Dserpent-avx-x86_64-asm_64.S584 K2(RA, RB, RC, RD, RE, 0);
585 S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);
586 S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);
587 S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);
588 S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);
589 S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);
590 S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);
591 S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);
592 S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);
593 S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);
[all …]
/arch/arm/crypto/
Dsha512-armv7-neon.S36 #define RE d4 macro
285 vld1.64 {RE-RH}, [%r0];
310 rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2,
315 rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2,
318 rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW2, RW3, RW23q, RW4,
320 rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5, RW45q, RW6,
322 rounds2_0_63(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7, RW67q, RW8,
324 rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9, RW89q, RW10,
326 rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11, RW1011q, RW12,
329 rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13, RW1213q, RW14,
[all …]
/arch/mips/mm/
Duasm-mips.c83 { insn_dinsm, M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE },
84 { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE },
87 { insn_drotr32, M(spec_op, 1, 0, 0, 0, dsrl32_op), RT | RD | RE },
88 { insn_drotr, M(spec_op, 1, 0, 0, 0, dsrl_op), RT | RD | RE },
89 { insn_dsll32, M(spec_op, 0, 0, 0, 0, dsll32_op), RT | RD | RE },
90 { insn_dsll, M(spec_op, 0, 0, 0, 0, dsll_op), RT | RD | RE },
91 { insn_dsra, M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE },
92 { insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE },
93 { insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE },
96 { insn_ext, M(spec3_op, 0, 0, 0, 0, ext_op), RS | RT | RD | RE },
[all …]
Duasm-micromips.c78 { insn_ins, M(mm_pool32a_op, 0, 0, 0, 0, mm_ins_op), RT | RS | RD | RE },
79 { insn_ext, M(mm_pool32a_op, 0, 0, 0, 0, mm_ext_op), RT | RS | RD | RE },
176 if (ip->fields & RE) in build_insn()
Duasm.c20 RE = 0x008, enumerator
/arch/powerpc/crypto/
Dsha1-powerpc-asm.S20 #define RE(t) ((((t)+0)%6)+7) macro
33 add r0,RE(t),r15; \
46 add r0,RE(t),r15; \
60 add r0,RE(t),r15; \
70 add r0,RE(t),r15; \
89 add r0,RE(t),r15; \
125 lwz RE(0),16(r3) /* E */
164 add r20,RE(80),r20
169 mr RE(0),r20
174 stw RE(0),16(r3)
/arch/blackfin/mach-bf527/include/mach/
DdefBF527.h166 #define RE 0x00000001 /* Receiver Enable */ macro
/arch/blackfin/mach-bf537/include/mach/
DdefBF537.h165 #define RE 0x00000001 /* Receiver Enable … macro
/arch/blackfin/mach-bf518/include/mach/
DdefBF516.h167 #define RE 0x00000001 /* Receiver Enable */ macro
/arch/m68k/fpsp040/
Dslogn.S380 |--AN RE-ENTRY POINT FOR LOGNP1
432 |--THIS IS AN RE-ENTRY POINT FOR LOGNP1
/arch/m68k/ifpsp060/src/
Dfplsp.S6412 #--THIS CAN BE RE-WRITTEN AS
8277 #--AN RE-ENTRY POINT FOR LOGNP1
Dfpsp.S8442 #--THIS IS AN RE-ENTRY POINT FOR LOGNP1