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Searched refs:REGBASE (Results 1 – 6 of 6) sorted by relevance

/arch/mips/include/asm/emma/
Demma2rh.h29 #define REGBASE 0x10000000 macro
31 #define EMMA2RH_BHIF_STRAP_0 (0x000010+REGBASE)
32 #define EMMA2RH_BHIF_INT_ST_0 (0x000030+REGBASE)
33 #define EMMA2RH_BHIF_INT_ST_1 (0x000034+REGBASE)
34 #define EMMA2RH_BHIF_INT_ST_2 (0x000038+REGBASE)
35 #define EMMA2RH_BHIF_INT_EN_0 (0x000040+REGBASE)
36 #define EMMA2RH_BHIF_INT_EN_1 (0x000044+REGBASE)
37 #define EMMA2RH_BHIF_INT_EN_2 (0x000048+REGBASE)
38 #define EMMA2RH_BHIF_INT1_EN_0 (0x000050+REGBASE)
39 #define EMMA2RH_BHIF_INT1_EN_1 (0x000054+REGBASE)
[all …]
/arch/mips/include/asm/mach-rc32434/
Dirq.h10 #define IC_GROUP0_PEND (REGBASE + 0x38000)
11 #define IC_GROUP0_MASK (REGBASE + 0x38008)
Drb.h20 #define REGBASE 0x18000000 macro
21 #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
/arch/mips/rb532/
Dserial.c44 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
Dgpio.c48 .start = REGBASE + GPIOBASE,
49 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
Ddevices.c226 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),