Searched refs:RS3 (Results 1 – 3 of 3) sorted by relevance
/arch/sparc/crypto/ |
D | opcodes.h | 12 #define RS3(x) (FPD_ENCODE(x) << 9) macro 30 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 32 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 34 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 36 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 38 .word (F3F(2, 0x19, 4)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 40 .word (F3F(2, 0x19, 5)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 42 .word (F3F(2, 0x19, 6)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 44 .word (F3F(2, 0x19, 7)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 59 .word (F3F(2, 0x19, 0x009)|RS1(a)|RS2(b)|RS3(c)|RD(d)); [all …]
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/arch/x86/crypto/ |
D | blowfish-avx2-asm_64.S | 56 #define RS3 %r10 macro 109 vpgatherdd RIDX1, (RS3, RIDX3, 4), RT1; \ 153 leaq s3(CTX), RS3; \
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D | twofish-avx2-asm_64.S | 50 #define RS3 %r10 macro 95 leaq s3(CTX), RS3; \ 141 g16(a, RS0, RS1, RS2, RS3, x); 144 g16(b, RS1, RS2, RS3, RS0, y);
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