Searched refs:RSI_CLK_CONTROL (Results 1 – 5 of 5) sorted by relevance
16 #define RSI_CLK_CONTROL 0xFFC03804 /* RSI Clock Control Register */ macro
17 #define bfin_read_RSI_CLK_CTL() bfin_read16(RSI_CLK_CONTROL)18 #define bfin_write_RSI_CLK_CTL(val) bfin_write16(RSI_CLK_CONTROL, val)
37 #define RSI_CLK_CONTROL 0xFFC00604 /* RSI0 Clock Control Register */ macro
3189 #define bfin_read_RSI_CLK_CTL() bfin_read16(RSI_CLK_CONTROL)3190 #define bfin_write_RSI_CLK_CTL(val) bfin_write16(RSI_CLK_CONTROL, val)
1374 D16(RSI_CLK_CONTROL); in bfin_debug_mmrs_init()