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Searched refs:RTCISR_SAM1 (Results 1 – 2 of 2) sorted by relevance

/arch/m68k/include/asm/
DMC68EZ328.h1080 #define RTCISR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt has occurred */ macro
DMC68VZ328.h1176 #define RTCISR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt has occurred */ macro