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Searched refs:S5P_GPS_ALIVE_LOWPWR (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
Dpmu.c94 { S5P_GPS_ALIVE_LOWPWR, { 0x7, 0x0, 0x0 } },
200 { S5P_GPS_ALIVE_LOWPWR, { 0x7, 0x0, 0x0 } },
/arch/arm/mach-exynos/include/mach/
Dregs-pmu.h125 #define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0) macro