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Searched refs:TIMER1_2_INTERRUPT_MASK_OFFSET (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-cns3xxx/
Dcore.c187 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
190 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
202 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
204 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
Dcns3xxx.h132 #define TIMER1_2_INTERRUPT_MASK_OFFSET 0x38 macro