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Searched refs:TIMER_ENABLE (Results 1 – 16 of 16) sorted by relevance

/arch/arm/mach-msm/
Dtimer.c35 #define TIMER_ENABLE 0x0008 macro
55 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_interrupt()
57 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_interrupt()
66 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_next_event()
69 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
78 writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
87 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_mode()
101 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_mode()
214 writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); in msm_timer_init()
/arch/hexagon/include/asm/
Dtimer-regs.h26 #define TIMER_ENABLE 0 macro
/arch/blackfin/include/asm/
Dgptimers.h22 # define TIMER0_GROUP_REG TIMER_ENABLE
59 # define TIMER0_GROUP_REG TIMER_ENABLE
/arch/hexagon/kernel/
Dtime.c96 iowrite32(1 << TIMER_ENABLE, &rtos_timer->enable); in set_next_event()
/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h97 #define TIMER_ENABLE 0xFFC00640 /* Timer Enable Register */ macro
DcdefBF532.h554 #define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
555 #define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE,val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h131 #define TIMER_ENABLE 0xFFC00680 /* Timer Enable Register */ macro
DcdefBF522.h215 #define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
216 #define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE, val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h136 #define TIMER_ENABLE 0xFFC00680 /* Timer Enable Register */ macro
DcdefBF512.h198 #define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
199 #define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h112 #define TIMER_ENABLE 0xFFC00680 /* Timer Enable Register */ macro
DcdefBF534.h182 #define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
183 #define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h100 #define TIMER_ENABLE 0xFFC00640 /* Timer Enable Register */ macro
DcdefBF538.h210 #define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
211 #define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE, val)
/arch/blackfin/kernel/
Dbfin_gpio.c39 AWA_inen = TIMER_ENABLE,
Ddebug-mmrs.c1061 #ifdef TIMER_ENABLE in bfin_debug_mmrs_init()
1062 GPTIMER_GROUP(TIMER_ENABLE, -1); in bfin_debug_mmrs_init()