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Searched refs:UIMM (Results 1 – 4 of 4) sorted by relevance

/arch/mips/mm/
Duasm-micromips.c56 { insn_andi, M(mm_andi32_op, 0, 0, 0, 0, 0), RT | RS | UIMM },
91 { insn_ori, M(mm_ori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM },
108 { insn_xori, M(mm_xori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM },
180 if (ip->fields & UIMM) in build_insn()
Duasm-mips.c63 { insn_andi, M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
120 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
147 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
212 if (ip->fields & UIMM) in build_insn()
Duasm.c22 UIMM = 0x020, enumerator
/arch/powerpc/xmon/
Dppc-opc.c538 #define UIMM SIMM + 1 macro
542 #define SHB UIMM + 1
2123 { "vcfsx", VX(4, 842), VX_MASK, PPCVEC, { VD, VB, UIMM } },
2124 { "vcfux", VX(4, 778), VX_MASK, PPCVEC, { VD, VB, UIMM } },
2151 { "vctsxs", VX(4, 970), VX_MASK, PPCVEC, { VD, VB, UIMM } },
2152 { "vctuxs", VX(4, 906), VX_MASK, PPCVEC, { VD, VB, UIMM } },
2222 { "vspltb", VX(4, 524), VX_MASK, PPCVEC, { VD, VB, UIMM } },
2223 { "vsplth", VX(4, 588), VX_MASK, PPCVEC, { VD, VB, UIMM } },
2227 { "vspltw", VX(4, 652), VX_MASK, PPCVEC, { VD, VB, UIMM } },
2261 { "evaddiw", VX(4, 514), VX_MASK, PPCSPE, { RS, RB, UIMM } },
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