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1/* ld script for sparc32/sparc64 kernel */
2
3#include <asm-generic/vmlinux.lds.h>
4
5#include <asm/page.h>
6#include <asm/thread_info.h>
7
8#ifdef CONFIG_SPARC32
9#define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
10#define TEXTSTART	0xf0004000
11
12#define SMP_CACHE_BYTES_SHIFT 5
13
14#else
15#define SMP_CACHE_BYTES_SHIFT 6
16#define INITIAL_ADDRESS 0x4000
17#define TEXTSTART      0x0000000000404000
18
19#endif
20
21#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
22
23#ifdef CONFIG_SPARC32
24OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
25OUTPUT_ARCH(sparc)
26ENTRY(_start)
27jiffies = jiffies_64 + 4;
28#else
29/* sparc64 */
30OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
31OUTPUT_ARCH(sparc:v9a)
32ENTRY(_start)
33jiffies = jiffies_64;
34#endif
35
36SECTIONS
37{
38	/* swapper_low_pmd_dir is sparc64 only */
39	swapper_low_pmd_dir = 0x0000000000402000;
40	. = INITIAL_ADDRESS;
41	.text TEXTSTART :
42	{
43		_text = .;
44		HEAD_TEXT
45		TEXT_TEXT
46		SCHED_TEXT
47		LOCK_TEXT
48		KPROBES_TEXT
49		IRQENTRY_TEXT
50		*(.gnu.warning)
51	} = 0
52	_etext = .;
53
54	RO_DATA(PAGE_SIZE)
55
56	/* Start of data section */
57	_sdata = .;
58
59	.data1 : {
60		*(.data1)
61	}
62	RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
63
64	/* End of data section */
65	_edata = .;
66
67	.fixup : {
68		__start___fixup = .;
69		*(.fixup)
70		__stop___fixup = .;
71	}
72	EXCEPTION_TABLE(16)
73	NOTES
74
75	. = ALIGN(PAGE_SIZE);
76	__init_begin = ALIGN(PAGE_SIZE);
77	INIT_TEXT_SECTION(PAGE_SIZE)
78	__init_text_end = .;
79	INIT_DATA_SECTION(16)
80
81	. = ALIGN(4);
82	.tsb_ldquad_phys_patch : {
83		__tsb_ldquad_phys_patch = .;
84		*(.tsb_ldquad_phys_patch)
85		__tsb_ldquad_phys_patch_end = .;
86	}
87
88	.tsb_phys_patch : {
89		__tsb_phys_patch = .;
90		*(.tsb_phys_patch)
91		__tsb_phys_patch_end = .;
92	}
93
94	.cpuid_patch : {
95		__cpuid_patch = .;
96		*(.cpuid_patch)
97		__cpuid_patch_end = .;
98	}
99
100	.sun4v_1insn_patch : {
101		__sun4v_1insn_patch = .;
102		*(.sun4v_1insn_patch)
103		__sun4v_1insn_patch_end = .;
104	}
105	.sun4v_2insn_patch : {
106		__sun4v_2insn_patch = .;
107		*(.sun4v_2insn_patch)
108		__sun4v_2insn_patch_end = .;
109	}
110	.leon_1insn_patch : {
111		__leon_1insn_patch = .;
112		*(.leon_1insn_patch)
113		__leon_1insn_patch_end = .;
114	}
115	.swapper_tsb_phys_patch : {
116		__swapper_tsb_phys_patch = .;
117		*(.swapper_tsb_phys_patch)
118		__swapper_tsb_phys_patch_end = .;
119	}
120	.swapper_4m_tsb_phys_patch : {
121		__swapper_4m_tsb_phys_patch = .;
122		*(.swapper_4m_tsb_phys_patch)
123		__swapper_4m_tsb_phys_patch_end = .;
124	}
125	.popc_3insn_patch : {
126		__popc_3insn_patch = .;
127		*(.popc_3insn_patch)
128		__popc_3insn_patch_end = .;
129	}
130	.popc_6insn_patch : {
131		__popc_6insn_patch = .;
132		*(.popc_6insn_patch)
133		__popc_6insn_patch_end = .;
134	}
135	.pause_3insn_patch : {
136		__pause_3insn_patch = .;
137		*(.pause_3insn_patch)
138		__pause_3insn_patch_end = .;
139	}
140	PERCPU_SECTION(SMP_CACHE_BYTES)
141
142	. = ALIGN(PAGE_SIZE);
143	__init_end = .;
144	BSS_SECTION(0, 0, 0)
145	_end = . ;
146
147	STABS_DEBUG
148	DWARF_DEBUG
149
150	DISCARDS
151}
152