/arch/mips/pci/ |
D | pci-tx4938.c | 25 (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ? in tx4938_report_pciclk() 27 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) { in tx4938_report_pciclk() 28 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pciclk() 61 __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pci1clk() 78 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) { in tx4938_pciclk66_setup() 80 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_pciclk66_setup() 109 (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg)); in tx4938_pciclk66_setup() 120 if (__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_pcic1_map_irq() 125 if (__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_pcic1_map_irq()
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D | pci-tx4927.c | 25 (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ? in tx4927_report_pciclk() 27 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) { in tx4927_report_pciclk() 28 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_report_pciclk() 58 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) { in tx4927_pciclk66_setup() 60 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_pciclk66_setup() 78 (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg)); in tx4927_pciclk66_setup()
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D | pci-tx4939.c | 25 (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ? in tx4939_report_pciclk() 27 if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) { in tx4939_report_pciclk() 29 if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66)) in tx4939_report_pciclk() 56 if (__raw_readq(&tx4939_ccfgptr->pcfg) & in tx4939_pcic1_map_irq() 61 if (__raw_readq(&tx4939_ccfgptr->pcfg) & in tx4939_pcic1_map_irq()
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/arch/mips/sibyte/swarm/ |
D | rtc_m41t81.c | 90 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_read() 97 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_read() 103 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_read() 106 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in m41t81_read() 112 return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff); in m41t81_read() 117 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_write() 125 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_write() 128 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in m41t81_write() 138 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in m41t81_write()
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D | rtc_xicor1241.c | 64 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read() 72 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read() 78 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_read() 81 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in xicor_read() 87 return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff); in xicor_read() 92 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_write() 100 while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) in xicor_write() 103 if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { in xicor_write()
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D | platform.c | 60 offset = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_START_ADDR, IDE_CS)); in swarm_pata_init() 61 size = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_MULT_SIZE, IDE_CS)); in swarm_pata_init()
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/arch/metag/include/asm/ |
D | io.h | 48 #define __raw_readq __raw_readq macro 49 static inline u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function 110 #define readq __raw_readq 124 #define metag_in64(addr) __raw_readq((volatile void __iomem *)(addr))
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/arch/mips/kernel/ |
D | csrc-bcm1480.c | 33 return (cycle_t) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); in bcm1480_hpt_read() 50 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in sb1480_clocksource_init()
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D | csrc-sb1250.c | 40 …count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))… in sb1250_hpt_read()
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/arch/mips/txx9/rbtx4927/ |
D | setup.c | 63 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); in tx4927_pci_setup() 68 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) in tx4927_pci_setup() 110 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB); in tx4937_pci_setup() 115 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) in tx4937_pci_setup() 229 switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) & in rbtx4927_clock_init() 255 switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) & in rbtx4937_clock_init()
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/arch/mips/sibyte/bcm1480/ |
D | setup.c | 123 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); in bcm1480_setup() 133 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in bcm1480_setup()
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D | irq.c | 170 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], in ack_bcm1480_irq() 332 mask_h = __raw_readq( in dispatch_ip2() 334 mask_l = __raw_readq( in dispatch_ip2()
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/arch/mips/sibyte/common/ |
D | sb_tbprof.c | 164 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); in arm_tb() 217 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr() 219 p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr() 221 p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr() 223 p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr() 225 p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr() 227 p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); in sbprof_tb_intr() 283 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); in sbprof_zbprof_start()
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/arch/mips/txx9/rbtx4938/ |
D | setup.c | 42 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB); in rbtx4938_pci_setup() 47 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) in rbtx4938_pci_setup() 85 if (__raw_readq(&tx4938_ccfgptr->pcfg) & in rbtx4938_pci_setup() 90 if (!(__raw_readq(&tx4938_ccfgptr->ccfg) in rbtx4938_pci_setup()
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/arch/mips/txx9/generic/ |
D | setup_tx4938.c | 296 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_ETH0_SEL) in tx4938_sio_init() 315 u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg); in tx4938_ethaddr_init() 359 if ((__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_ata_init() 365 ebccr = __raw_readq(&tx4938_ebuscptr->cr[i]); in tx4938_ata_init() 396 if ((__raw_readq(&tx4938_ccfgptr->pcfg) & in tx4938_ndfmc_init() 419 u64 pcfg = __raw_readq(&tx4938_ccfgptr->pcfg); in tx4938_aclc_init()
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D | mem_tx4927.c | 48 val = __raw_readq(addr); in tx4927_process_sdccr()
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D | setup_tx4939.c | 302 __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); in tx4939_sio_init() 358 u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); in tx4939_ethaddr_init() 420 __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); in tx4939_ata_init() 485 u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); in tx4939_aclc_init()
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/arch/mips/sibyte/sb1250/ |
D | setup.c | 186 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); in sb1250_setup() 195 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); in sb1250_setup()
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D | irq.c | 152 pending = __raw_readq(IOADDR(A_IMR_REGISTER(sb1250_irq_owner[irq], in ack_sb1250_irq() 300 mask = __raw_readq(IOADDR(A_IMR_REGISTER(cpu, in dispatch_ip2()
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/arch/mips/include/asm/txx9/ |
D | tx4927.h | 201 ((__u32)__raw_readq(&tx4927_ccfgptr->crir) >> 16) 203 #define TX4927_SDRAMC_CR(ch) __raw_readq(&tx4927_sdramcptr->cr[(ch)]) 208 #define TX4927_EBUSC_CR(ch) __raw_readq(&tx4927_ebuscptr->cr[(ch)])
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/arch/s390/include/asm/ |
D | io.h | 79 #define __raw_readq zpci_read_u64 macro
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/arch/alpha/kernel/ |
D | io.c | 114 u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function 142 EXPORT_SYMBOL(__raw_readq); 171 u64 ret = __raw_readq(addr); in readq() 428 *(u64 *)to = __raw_readq(from); in memcpy_fromio()
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/arch/tile/include/asm/ |
D | io.h | 99 static inline u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function 165 #define __raw_readq(addr) _tile_readq((unsigned long)addr) macro 233 #define readq __raw_readq
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/arch/alpha/include/asm/ |
D | io.h | 263 extern u64 __raw_readq(const volatile void __iomem *addr); 450 extern inline u64 __raw_readq(const volatile void __iomem *addr) in __raw_readq() function 474 u64 ret = __raw_readq(addr); in readq() 506 #define readq_relaxed(addr) __raw_readq(addr)
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/arch/parisc/include/asm/ |
D | io.h | 155 static inline unsigned long long __raw_readq(const volatile void __iomem *addr) in __raw_readq() function 191 return le64_to_cpu(__raw_readq(addr)); in readq()
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