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Searched refs:addr1 (Results 1 – 24 of 24) sorted by relevance

/arch/sh/kernel/cpu/sh3/
Dprobe.c21 unsigned long addr0, addr1, data0, data1, data2, data3; in cpu_probe() local
30 addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12); in cpu_probe()
35 data1 = __raw_readl(addr1); in cpu_probe()
36 __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1); in cpu_probe()
42 data1 = __raw_readl(addr1); in cpu_probe()
44 __raw_writel(data2, addr1); in cpu_probe()
49 __raw_writel(data2&~SH_CACHE_VALID, addr1); in cpu_probe()
/arch/blackfin/kernel/cplb-nompu/
Dcplbmgr.c101 unsigned long i_data, base, addr1, eaddr; in icplb_miss() local
123 addr1 = addr & ~(SIZE_4M - 1); in icplb_miss()
126 if (addr1 >= base && (addr1 + SIZE_4M) <= eaddr) { in icplb_miss()
132 addr = addr1; in icplb_miss()
148 unsigned long d_data, base, addr1, eaddr, cplb_pagesize, cplb_pageflags; in dcplb_miss() local
183 addr1 = addr & ~(cplb_pagesize - 1); in dcplb_miss()
184 if (addr1 >= base && (addr1 + cplb_pagesize) <= eaddr) { in dcplb_miss()
190 addr = addr1; in dcplb_miss()
/arch/sh/mm/
Dtlb-debugfs.c42 unsigned long addr1, addr2, data1, data2; in tlb_seq_show() local
55 addr1 = MMU_ITLB_ADDRESS_ARRAY; in tlb_seq_show()
61 addr1 = MMU_UTLB_ADDRESS_ARRAY; in tlb_seq_show()
78 addr1 = MMU_ITLB_ADDRESS_ARRAY; in tlb_seq_show()
84 addr1 = MMU_UTLB_ADDRESS_ARRAY; in tlb_seq_show()
100 val = __raw_readl(addr1 | (entry << MMU_TLB_ENTRY_SHIFT)); in tlb_seq_show()
Dcache-sh4.c47 start = data->addr1; in sh4_flush_icache_range()
218 address = data->addr1 & PAGE_MASK; in sh4_flush_cache_page()
283 start = data->addr1; in sh4_flush_cache_range()
Dcache-sh5.c532 start = data->addr1; in sh5_flush_cache_range()
555 eaddr = data->addr1; in sh5_flush_cache_page()
583 start = data->addr1; in sh5_flush_icache_range()
Dcache.c197 data.addr1 = addr; in flush_cache_page()
209 data.addr1 = start; in flush_cache_range()
227 data.addr1 = start; in flush_icache_range()
Dcache-sh7705.c72 start = data->addr1; in sh7705_flush_icache_range()
Dcache-sh2a.c157 start = data->addr1 & ~(L1_CACHE_BYTES-1); in sh2a_flush_icache_range()
/arch/sh/kernel/
Dsmp.c377 unsigned long addr1; member
385 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); in flush_tlb_range_ipi()
398 fd.addr1 = start; in flush_tlb_range()
415 local_flush_tlb_kernel_range(fd->addr1, fd->addr2); in flush_tlb_kernel_range_ipi()
422 fd.addr1 = start; in flush_tlb_kernel_range()
431 local_flush_tlb_page(fd->vma, fd->addr1); in flush_tlb_page_ipi()
442 fd.addr1 = page; in flush_tlb_page()
457 local_flush_tlb_one(fd->addr1, fd->addr2); in flush_tlb_one_ipi()
464 fd.addr1 = asid; in flush_tlb_one()
/arch/mips/kernel/
Dsmp.c303 unsigned long addr1; member
311 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); in flush_tlb_range_ipi()
322 .addr1 = start, in flush_tlb_range()
343 local_flush_tlb_kernel_range(fd->addr1, fd->addr2); in flush_tlb_kernel_range_ipi()
349 .addr1 = start, in flush_tlb_kernel_range()
360 local_flush_tlb_page(fd->vma, fd->addr1); in flush_tlb_page_ipi()
369 .addr1 = page, in flush_tlb_page()
/arch/score/kernel/
Dptrace.c241 child->thread.addr1 = epc; in user_enable_single_step()
246 child->thread.addr1 = epc; in user_enable_single_step()
263 child->thread.addr1 = epc; in user_enable_single_step()
268 child->thread.addr1 = epc; in user_enable_single_step()
296 write_tsk_short(child, child->thread.addr1, in user_disable_single_step()
300 write_tsk_long(child, child->thread.addr1, in user_disable_single_step()
305 write_tsk_short(child, child->thread.addr1, in user_disable_single_step()
308 write_tsk_long(child, child->thread.addr1, in user_disable_single_step()
Dtraps.c245 if ((epc == current->thread.addr1) || in do_ri()
/arch/powerpc/mm/
Dslb.c164 static inline int esids_match(unsigned long addr1, unsigned long addr2) in esids_match() argument
170 return (GET_ESID(addr1) == GET_ESID(addr2)); in esids_match()
172 esid_1t_count = (((addr1 >> SID_SHIFT_1T) != 0) + in esids_match()
177 return (GET_ESID(addr1) == GET_ESID(addr2)); in esids_match()
184 return (GET_ESID_1T(addr1) == GET_ESID_1T(addr2)); in esids_match()
/arch/arc/include/asm/
Dcacheflush.h101 #define addr_not_cache_congruent(addr1, addr2) \ argument
104 (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \
/arch/x86/kvm/
Di8259.c403 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1) in pic_poll_read() argument
409 if (addr1 >> 7) { in pic_poll_read()
415 if (addr1 >> 7 || ret != 2) in pic_poll_read()
425 static u32 pic_ioport_read(void *opaque, u32 addr1) in pic_ioport_read() argument
431 addr = addr1; in pic_ioport_read()
434 ret = pic_poll_read(s, addr1); in pic_ioport_read()
453 static u32 elcr_ioport_read(void *opaque, u32 addr1) in elcr_ioport_read() argument
/arch/mips/include/asm/
Dpage.h68 static inline unsigned long pages_do_alias(unsigned long addr1, in pages_do_alias() argument
71 return (addr1 ^ addr2) & shm_align_mask; in pages_do_alias()
/arch/sh/include/asm/
Dpage.h55 pages_do_alias(unsigned long addr1, unsigned long addr2) in pages_do_alias() argument
57 return (addr1 ^ addr2) & shm_align_mask; in pages_do_alias()
Dcacheflush.h54 unsigned long addr1, addr2; member
/arch/score/include/asm/
Dprocessor.h68 unsigned long addr1; member
/arch/mips/txx9/generic/
Dsetup_tx4939.c356 void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1) in tx4939_ethaddr_init() argument
362 if (addr1 && (pcfg & TX4939_PCFG_ET1MODE)) in tx4939_ethaddr_init()
363 txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(1), addr1); in tx4939_ethaddr_init()
367 void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1) in tx4939_ethaddr_init() argument
Dsetup_tx4938.c313 void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1) in tx4938_ethaddr_init() argument
319 if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL)) in tx4938_ethaddr_init()
320 txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1); in tx4938_ethaddr_init()
/arch/mips/include/asm/txx9/
Dtx4938.h285 void tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1);
Dtx4939.h535 void tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1);
/arch/x86/kernel/apic/
Dx2apic_uv_x.c566 unsigned long addr1, addr2; in map_mmioh_high_uv3() local
576 addr1 = (base << shift) + in map_mmioh_high_uv3()
581 id, fi, li, lnasid, addr1, addr2); in map_mmioh_high_uv3()