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Searched refs:arg1 (Results 1 – 25 of 83) sorted by relevance

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/arch/x86/include/asm/
Dlinkage.h29 #define __asmlinkage_protect1(ret, arg1) \ argument
30 __asmlinkage_protect_n(ret, "m" (arg1))
31 #define __asmlinkage_protect2(ret, arg1, arg2) \ argument
32 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2))
33 #define __asmlinkage_protect3(ret, arg1, arg2, arg3) \ argument
34 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2), "m" (arg3))
35 #define __asmlinkage_protect4(ret, arg1, arg2, arg3, arg4) \ argument
36 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2), "m" (arg3), \
38 #define __asmlinkage_protect5(ret, arg1, arg2, arg3, arg4, arg5) \ argument
39 __asmlinkage_protect_n(ret, "m" (arg1), "m" (arg2), "m" (arg3), \
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Dparavirt_types.h614 #define PVOP_CALL1(rettype, op, arg1) \ argument
615 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
616 #define PVOP_VCALL1(op, arg1) \ argument
617 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
619 #define PVOP_CALLEE1(rettype, op, arg1) \ argument
620 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
621 #define PVOP_VCALLEE1(op, arg1) \ argument
622 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
625 #define PVOP_CALL2(rettype, op, arg1, arg2) \ argument
626 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
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Dlguest_hcall.h49 unsigned long arg1, unsigned long arg2, unsigned long arg3, in hcall() argument
57 : "a"(call), "b"(arg1), "c"(arg2), "d"(arg3), "S"(arg4) in hcall()
72 unsigned long arg0, arg1, arg2, arg3, arg4; member
/arch/x86/um/shared/sysdep/
Dstub_32.h24 static inline long stub_syscall1(long syscall, long arg1) in stub_syscall1() argument
28 __asm__ volatile ("int $0x80" : "=a" (ret) : "0" (syscall), "b" (arg1)); in stub_syscall1()
33 static inline long stub_syscall2(long syscall, long arg1, long arg2) in stub_syscall2() argument
37 __asm__ volatile ("int $0x80" : "=a" (ret) : "0" (syscall), "b" (arg1), in stub_syscall2()
43 static inline long stub_syscall3(long syscall, long arg1, long arg2, long arg3) in stub_syscall3() argument
47 __asm__ volatile ("int $0x80" : "=a" (ret) : "0" (syscall), "b" (arg1), in stub_syscall3()
53 static inline long stub_syscall4(long syscall, long arg1, long arg2, long arg3, in stub_syscall4() argument
58 __asm__ volatile ("int $0x80" : "=a" (ret) : "0" (syscall), "b" (arg1), in stub_syscall4()
64 static inline long stub_syscall5(long syscall, long arg1, long arg2, long arg3, in stub_syscall5() argument
69 __asm__ volatile ("int $0x80" : "=a" (ret) : "0" (syscall), "b" (arg1), in stub_syscall5()
Dstub_64.h29 static inline long stub_syscall2(long syscall, long arg1, long arg2) in stub_syscall2() argument
35 : "0" (syscall), "D" (arg1), "S" (arg2) : __syscall_clobber ); in stub_syscall2()
40 static inline long stub_syscall3(long syscall, long arg1, long arg2, long arg3) in stub_syscall3() argument
46 : "0" (syscall), "D" (arg1), "S" (arg2), "d" (arg3) in stub_syscall3()
52 static inline long stub_syscall4(long syscall, long arg1, long arg2, long arg3, in stub_syscall4() argument
59 : "0" (syscall), "D" (arg1), "S" (arg2), "d" (arg3), in stub_syscall4()
66 static inline long stub_syscall5(long syscall, long arg1, long arg2, long arg3, in stub_syscall5() argument
73 : "0" (syscall), "D" (arg1), "S" (arg2), "d" (arg3), in stub_syscall5()
/arch/cris/include/arch-v10/arch/
Dunistd.h26 #define _syscall1(type,name,type1,arg1) \ argument
27 type name(type1 arg1) \
29 register long __a __asm__ ("r10") = (long) arg1; \
43 #define _syscall2(type,name,type1,arg1,type2,arg2) \ argument
44 type name(type1 arg1,type2 arg2) \
46 register long __a __asm__ ("r10") = (long) arg1; \
61 #define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ argument
62 type name(type1 arg1,type2 arg2,type3 arg3) \
64 register long __a __asm__ ("r10") = (long) arg1; \
80 #define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ argument
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/arch/cris/include/arch-v32/arch/
Dunistd.h27 #define _syscall1(type,name,type1,arg1) \ argument
28 type name(type1 arg1) \
30 register long __a __asm__ ("r10") = (long) arg1; \
45 #define _syscall2(type,name,type1,arg1,type2,arg2) \ argument
46 type name(type1 arg1,type2 arg2) \
48 register long __a __asm__ ("r10") = (long) arg1; \
64 #define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ argument
65 type name(type1 arg1,type2 arg2,type3 arg3) \
67 register long __a __asm__ ("r10") = (long) arg1; \
84 #define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ argument
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/arch/ia64/include/asm/
Dparavirt_privop.h315 #define PARAVIRT_BR1(op, type, arg1) \ argument
316 register unsigned long __##arg1 asm ("r8") = arg1; \
321 : PARAVIRT_OP(op), "0"(__##arg1) \
324 #define PARAVIRT_BR1_RET(op, type, arg1) \ argument
326 register unsigned long __##arg1 asm ("r8") = arg1; \
330 : PARAVIRT_OP(op), "0"(__##arg1) \
333 #define PARAVIRT_BR1_VOID(op, type, arg1) \ argument
334 register void *__##arg1 asm ("r8") = arg1; \
339 : PARAVIRT_OP(op), "0"(__##arg1) \
342 #define PARAVIRT_BR2(op, type, arg1, arg2) \ argument
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/arch/sparc/include/asm/
Dsmp_32.h59 void (*cross_call)(smpfunc_t func, cpumask_t mask, unsigned long arg1,
73 static inline void xc1(smpfunc_t func, unsigned long arg1) in xc1() argument
75 sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, 0, 0, 0); in xc1()
77 static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) in xc2() argument
79 sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0); in xc2()
82 static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, in xc3() argument
86 arg1, arg2, arg3, 0); in xc3()
89 static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, in xc4() argument
93 arg1, arg2, arg3, arg4); in xc4()
/arch/parisc/include/asm/
Dunistd.h112 #define _syscall1(type,name,type1,arg1) \ argument
113 type name(type1 arg1) \
115 return K_INLINE_SYSCALL(name, 1, arg1); \
118 #define _syscall2(type,name,type1,arg1,type2,arg2) \ argument
119 type name(type1 arg1, type2 arg2) \
121 return K_INLINE_SYSCALL(name, 2, arg1, arg2); \
124 #define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ argument
125 type name(type1 arg1, type2 arg2, type3 arg3) \
127 return K_INLINE_SYSCALL(name, 3, arg1, arg2, arg3); \
130 #define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ argument
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/arch/parisc/kernel/
Dreal2.S80 ldw 0(%arg1), %arg0 /* note overwriting arg0 */
81 ldw -8(%arg1), %arg2
82 ldw -12(%arg1), %arg3
83 ldw -4(%arg1), %arg1 /* obviously must do this one last! */
250 ldo 64(%arg1), %r29
254 ldd 0*REG_SZ(%arg1), %arg0 /* note overwriting arg0 */
255 ldd 2*REG_SZ(%arg1), %arg2
256 ldd 3*REG_SZ(%arg1), %arg3
257 ldd 4*REG_SZ(%arg1), %r22
258 ldd 5*REG_SZ(%arg1), %r21
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Dpacache.S84 LDREG ITLB_OFF_STRIDE(%r1), %arg1
100 pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */
114 pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */
127 LDREG DTLB_OFF_STRIDE(%r1), %arg1
143 pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */
157 pdtlbe,m %arg1(%sr1, %r28) /* pdtlbe for one loop */
207 LDREG ICACHE_STRIDE(%r1), %arg1
218 fice,m %arg1(%sr1, %arg0) /* Last fice and addr adjust */
227 fice,m %arg1(%sr1, %arg0)
228 fice,m %arg1(%sr1, %arg0)
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Dhpmc.S156 ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */
172 ldo 0(%r0),arg1 /* log IO errors */
197 ldo PDC_IODC_READ(%r0),arg1
217 ldo ENTRY_INIT_MOD_DEV(%r0), arg1
275 ldo 0(%r0),arg1 /* do reset */
/arch/arm/mach-bcm/
Dbcm_kona_smc.c33 unsigned arg1; member
80 args[1] = data->arg1; in __bcm_kona_smc()
95 unsigned bcm_kona_smc(unsigned service_id, unsigned arg0, unsigned arg1, in bcm_kona_smc() argument
102 data.arg1 = arg1; in bcm_kona_smc()
/arch/tile/include/uapi/arch/
Dsim.h231 static __inline long _sim_syscall1(int val, long arg1) in _sim_syscall1() argument
235 : "=R00" (result) : "R00" (val), "R01" (arg1)); in _sim_syscall1()
239 static __inline long _sim_syscall2(int val, long arg1, long arg2) in _sim_syscall2() argument
244 : "R00" (val), "R01" (arg1), "R02" (arg2)); in _sim_syscall2()
253 static __inline long _sim_syscall3(int val, long arg1, long arg2, long arg3) in _sim_syscall3() argument
259 : "R00" (val), "R01" (arg1), "R02" (arg2), in _sim_syscall3()
264 static __inline long _sim_syscall4(int val, long arg1, long arg2, long arg3, in _sim_syscall4() argument
271 : "R00" (val), "R01" (arg1), "R02" (arg2), in _sim_syscall4()
276 static __inline long _sim_syscall5(int val, long arg1, long arg2, long arg3, in _sim_syscall5() argument
283 : "R00" (val), "R01" (arg1), "R02" (arg2), in _sim_syscall5()
/arch/alpha/include/asm/
Dpal.h41 extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \
44 register TYPE1 __r17 __asm__("$17") = arg1; \
66 extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \
70 register TYPE1 __r17 __asm__("$17") = arg1; \
96 #define __tbi(nr,arg,arg1...) \ argument
103 :"0" (__r16),"i" (PAL_tbi) ,##arg1 \
/arch/x86/lguest/
Dboot.c105 static void async_hcall(unsigned long call, unsigned long arg1, in async_hcall() argument
121 hcall(call, arg1, arg2, arg3, arg4); in async_hcall()
124 lguest_data.hcalls[next_call].arg1 = arg1; in async_hcall()
151 static void lazy_hcall1(unsigned long call, unsigned long arg1) in lazy_hcall1() argument
154 hcall(call, arg1, 0, 0, 0); in lazy_hcall1()
156 async_hcall(call, arg1, 0, 0, 0); in lazy_hcall1()
161 unsigned long arg1, in lazy_hcall2() argument
165 hcall(call, arg1, arg2, 0, 0); in lazy_hcall2()
167 async_hcall(call, arg1, arg2, 0, 0); in lazy_hcall2()
171 unsigned long arg1, in lazy_hcall3() argument
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/arch/mips/kernel/
Dsyscall.c328 SYSCALL_DEFINE3(sysmips, long, cmd, long, arg1, long, arg2) in SYSCALL_DEFINE3() argument
332 return mips_atomic_set(arg1, arg2); in SYSCALL_DEFINE3()
335 if (arg1 & ~3) in SYSCALL_DEFINE3()
338 if (arg1 & 1) in SYSCALL_DEFINE3()
342 if (arg1 & 2) in SYSCALL_DEFINE3()
354 return mips_fpu_prctl(arg1, arg2); in SYSCALL_DEFINE3()
/arch/sparc/kernel/
Dsun4m_smp.c160 unsigned long arg1; member
172 static void sun4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1, in sun4m_cross_call() argument
183 ccall_info.arg1 = arg1; in sun4m_cross_call()
235 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3, in smp4m_cross_call_irq()
/arch/arm/mach-omap2/
Domap-secure.c35 u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, u32 arg1, u32 arg2, in omap_secure_dispatcher() argument
42 param[1] = arg1; in omap_secure_dispatcher()
/arch/arm/kernel/
Dpsci.c83 static noinline int __invoke_psci_fn_hvc(u32 function_id, u32 arg0, u32 arg1, in __invoke_psci_fn_hvc() argument
93 : "r" (arg0), "r" (arg1), "r" (arg2)); in __invoke_psci_fn_hvc()
98 static noinline int __invoke_psci_fn_smc(u32 function_id, u32 arg0, u32 arg1, in __invoke_psci_fn_smc() argument
108 : "r" (arg0), "r" (arg1), "r" (arg2)); in __invoke_psci_fn_smc()
/arch/ia64/kernel/
Dsal.c358 ia64_sal_oemcall(struct ia64_sal_retval *isrvp, u64 oemfunc, u64 arg1, in ia64_sal_oemcall() argument
363 SAL_CALL(*isrvp, oemfunc, arg1, arg2, arg3, arg4, arg5, arg6, arg7); in ia64_sal_oemcall()
369 ia64_sal_oemcall_nolock(struct ia64_sal_retval *isrvp, u64 oemfunc, u64 arg1, in ia64_sal_oemcall_nolock() argument
375 SAL_CALL_NOLOCK(*isrvp, oemfunc, arg1, arg2, arg3, arg4, arg5, arg6, in ia64_sal_oemcall_nolock()
383 u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, in ia64_sal_oemcall_reentrant() argument
388 SAL_CALL_REENTRANT(*isrvp, oemfunc, arg1, arg2, arg3, arg4, arg5, arg6, in ia64_sal_oemcall_reentrant()
Desi.c102 u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, in ia64_esi_call() argument
133 *isrvp = (*esi_proc)(func, arg1, arg2, arg3, in ia64_esi_call()
153 u64 func, u64 arg1, u64 arg2, u64 arg3, u64 arg4, in ia64_esi_call_phys() argument
179 esi_params[1] = arg1; in ia64_esi_call_phys()
/arch/x86/math-emu/
Dpoly.h62 static inline unsigned long mul_32_32(const unsigned long arg1, in mul_32_32() argument
67 :"0"(arg1), "g"(arg2) in mul_32_32()
/arch/x86/crypto/
Daesni-intel_asm.S82 #define arg1 rdi macro
258 pxor 16*0(%arg1), %xmm\index
265 movaps 0x20(%arg1), \TMP1
269 movaps 0x30(%arg1), \TMP1
273 movaps 0x40(%arg1), \TMP1
277 movaps 0x50(%arg1), \TMP1
281 movaps 0x60(%arg1), \TMP1
285 movaps 0x70(%arg1), \TMP1
289 movaps 0x80(%arg1), \TMP1
293 movaps 0x90(%arg1), \TMP1
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