/arch/x86/kernel/cpu/mcheck/ |
D | mce_intel.c | 52 static int cmci_supported(int *banks) in cmci_supported() argument 69 *banks = min_t(unsigned, MAX_NR_BANKS, cap & 0xff); in cmci_supported() 179 static void cmci_discover(int banks) in cmci_discover() argument 187 for (i = 0; i < banks; i++) { in cmci_discover() 253 int banks; in cmci_recheck() local 255 if (!mce_available(__this_cpu_ptr(&cpu_info)) || !cmci_supported(&banks)) in cmci_recheck() 270 int banks; in cmci_clear() local 273 if (!cmci_supported(&banks)) in cmci_clear() 276 for (i = 0; i < banks; i++) { in cmci_clear() 290 int banks; in cmci_rediscover_work_func() local [all …]
|
D | mce.c | 591 for (i = 0; i < mca_cfg.banks; i++) { in machine_check_poll() 650 for (i = 0; i < mca_cfg.banks; i++) { in mce_no_way_out() 939 for (i = 0; i < mca_cfg.banks; i++) { in mce_clear_state() 1032 if (!cfg->banks) in do_machine_check() 1059 for (i = 0; i < cfg->banks; i++) { in do_machine_check() 1366 u8 num_banks = mca_cfg.banks; in __mcheck_cpu_mce_banks_init() 1392 if (!mca_cfg.banks) in __mcheck_cpu_cap_init() 1402 WARN_ON(mca_cfg.banks != 0 && b != mca_cfg.banks); in __mcheck_cpu_cap_init() 1403 mca_cfg.banks = b; in __mcheck_cpu_cap_init() 1444 for (i = 0; i < mca_cfg.banks; i++) { in __mcheck_cpu_init_generic() [all …]
|
D | mce_amd.c | 217 for (bank = 0; bank < mca_cfg.banks; ++bank) { in mce_amd_feature_init() 279 for (bank = 0; bank < mca_cfg.banks; ++bank) { in amd_threshold_interrupt() 470 if ((bank >= mca_cfg.banks) || (block >= NR_BLOCKS)) in allocate_threshold_blocks() 641 bp = kzalloc(sizeof(struct threshold_bank *) * mca_cfg.banks, in threshold_create_device() 648 for (bank = 0; bank < mca_cfg.banks; ++bank) { in threshold_create_device() 730 for (bank = 0; bank < mca_cfg.banks; ++bank) { in threshold_remove_device()
|
/arch/arm/mach-omap2/ |
D | powerdomains44xx_data.c | 41 .banks = 5, 66 .banks = 1, 84 .banks = 2, 104 .banks = 1, 122 .banks = 3, 143 .banks = 1, 160 .banks = 1, 177 .banks = 1, 193 .banks = 1, 210 .banks = 3, [all …]
|
D | powerdomains3xxx_data.c | 40 .banks = 4, 62 .banks = 1, 78 .banks = 1, 103 .banks = 2, 125 .banks = 2, 142 .banks = 2, 159 .banks = 1, 174 .banks = 1, 195 .banks = 1, 210 .banks = 1, [all …]
|
D | powerdomains2xxx_data.c | 34 .banks = 1, 49 .banks = 1, 64 .banks = 3, 90 .banks = 1,
|
D | powerdomains33xx_data.c | 33 .banks = 1, 84 .banks = 3, 127 .banks = 3,
|
D | powerdomain.c | 123 for (i = 0; i < pwrdm->banks; i++) in _pwrdm_register() 145 for (i = 0; i < pwrdm->banks; i++) { in _update_logic_membank_counters() 571 return pwrdm->banks; in pwrdm_get_mem_bank_count() 728 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_onst() 766 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_retst() 862 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_pwrst() 892 if (pwrdm->banks < (bank + 1)) in pwrdm_read_prev_mem_pwrst() 921 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_retst() 1152 for (i = 0; i < pwrdm->banks; i++) in pwrdm_get_context_loss_count() 1196 for (i = 0; i < pwrdm->banks; i++) in pwrdm_can_ever_lose_context() [all …]
|
D | powerdomains2xxx_3xxx_data.c | 50 .banks = 1,
|
D | pm-debug.c | 113 for (i = 0; i < pwrdm->banks; i++) in pwrdm_dbg_show_counter()
|
D | powerdomain.h | 122 const u8 banks; member
|
/arch/mips/bcm63xx/ |
D | cpu.c | 250 unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; in detect_memory_size() local 266 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; in detect_memory_size() 274 banks = 2; in detect_memory_size() 283 return 1 << (cols + rows + (is_32bits + 1) + banks); in detect_memory_size()
|
/arch/mips/include/asm/mach-jz4740/ |
D | jz4740_nand.h | 32 unsigned char banks[JZ_NAND_NUM_BANKS]; member
|
/arch/arm/plat-samsung/ |
D | s5p-irq-gpioint.c | 42 static LIST_HEAD(banks); 122 list_for_each_entry(b, &banks, list) { in s5p_gpioint_add() 216 list_add_tail(&bank->list, &banks); in s5p_register_gpioint_bank()
|
/arch/arm/boot/dts/ |
D | sama5d3.dtsi | 898 atmel,nb-banks = <1>; 904 atmel,nb-banks = <3>; 912 atmel,nb-banks = <3>; 920 atmel,nb-banks = <2>; 927 atmel,nb-banks = <2>; 934 atmel,nb-banks = <2>; 941 atmel,nb-banks = <2>; 948 atmel,nb-banks = <2>; 955 atmel,nb-banks = <2>; 961 atmel,nb-banks = <2>; [all …]
|
D | bcm2835.dtsi | 54 * The GPIO IP block is designed for 3 banks of GPIOs. 58 * Since the BCM2835 only has 2 banks, the 2nd bank
|
/arch/mips/sgi-ip27/ |
D | ip27-memory.c | 269 klmembnk_t *banks; in slot_psize_compute() local 279 banks = (klmembnk_t *) find_first_component(brd, KLSTRUCT_MEMBNK); in slot_psize_compute() 280 if (!banks) in slot_psize_compute() 284 size = (unsigned long)banks->membnk_bnksz[slot/4]; in slot_psize_compute()
|
/arch/x86/boot/ |
D | vesa.h | 49 u8 banks; /* 26 */ member
|
/arch/arm/kernel/ |
D | tcm.c | 107 static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, in setup_tcm_bank() argument 120 if (banks > 1) in setup_tcm_bank()
|
/arch/x86/include/asm/ |
D | mce.h | 98 u8 banks; member
|
/arch/sh/ |
D | Kconfig.cpu | 96 See <file:Documentation/sh/register-banks.txt> for further
|
/arch/mips/include/asm/sibyte/ |
D | bcm1480_regs.h | 165 #define A_BCM1480_L2_WAY_ENABLE(A, banks) (A | (((~(banks))&0x0F) << 8)) argument
|
/arch/mips/jz4740/ |
D | board-qi_lb60.c | 143 .banks = { 1 },
|
/arch/x86/kvm/ |
D | x86.c | 2797 u64 *banks = vcpu->arch.mce_banks; in kvm_vcpu_ioctl_x86_set_mce() local 2808 banks += 4 * mce->bank; in kvm_vcpu_ioctl_x86_set_mce() 2813 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0) in kvm_vcpu_ioctl_x86_set_mce() 2821 if (banks[1] & MCI_STATUS_VAL) in kvm_vcpu_ioctl_x86_set_mce() 2823 banks[2] = mce->addr; in kvm_vcpu_ioctl_x86_set_mce() 2824 banks[3] = mce->misc; in kvm_vcpu_ioctl_x86_set_mce() 2826 banks[1] = mce->status; in kvm_vcpu_ioctl_x86_set_mce() 2828 } else if (!(banks[1] & MCI_STATUS_VAL) in kvm_vcpu_ioctl_x86_set_mce() 2829 || !(banks[1] & MCI_STATUS_UC)) { in kvm_vcpu_ioctl_x86_set_mce() 2830 if (banks[1] & MCI_STATUS_VAL) in kvm_vcpu_ioctl_x86_set_mce() [all …]
|
/arch/microblaze/platform/generic/ |
D | system.dts | 170 xlnx,num-banks-mem = <0x1>;
|