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Searched refs:bfin_write_SICB_IWR0 (Results 1 – 2 of 2) sorted by relevance

/arch/blackfin/mach-bf561/
Dsmp.c67 bfin_write_SICB_IWR0(IWR_DISABLE_ALL); in platform_secondary_init()
/arch/blackfin/mach-bf561/include/mach/
DcdefBF561.h93 #define bfin_write_SICB_IWR0(val) bfin_write32(SICB_IWR0,val) macro