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Searched refs:clk_rate (Results 1 – 8 of 8) sorted by relevance

/arch/m68k/include/asm/
Dmcfclk.h32 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \ argument
36 .rate = clk_rate, \
43 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \ argument
46 .rate = clk_rate, \
/arch/mips/jz4740/
Dtime.c109 uint32_t clk_rate; in plat_time_init() local
114 clk_rate = jz4740_clock_bdata.ext_rate >> 4; in plat_time_init()
115 jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ); in plat_time_init()
117 clockevent_set_clock(&jz4740_clockevent, clk_rate); in plat_time_init()
124 ret = clocksource_register_hz(&jz4740_clocksource, clk_rate); in plat_time_init()
/arch/arm/mach-msm/
Dboard-trout-panel.c241 .clk_rate = 122880000,
250 .clk_rate = 0,
/arch/blackfin/kernel/
Dsetup.c897 u_long clk_rate; in bfin_get_clk() local
903 clk_rate = clk_get_rate(clk); in bfin_get_clk()
905 return clk_rate; in bfin_get_clk()
/arch/arm/mach-omap2/
Dboard-omap4panda.c139 .clk_rate = 19200000,
/arch/arm/mach-s5pv210/
Dmach-goni.c833 .clk_rate = 16000000UL,
/arch/arm/mach-exynos/
Dmach-universal_c210.c941 .clk_rate = 166000000UL,
Dmach-nuri.c1180 .clk_rate = 166000000UL,