| /arch/m68k/include/asm/ |
| D | entry.h | 75 moveml %d1-%d5/%a0-%a2,%sp@
85 moveml %d1-%d5/%a0-%a2,%sp@
100 moveml %sp@,%d1-%d5/%a0-%a2
131 moveml %d1-%d5/%a0-%a2,%sp@
140 moveml %d1-%d5/%a0-%a2,%sp@
144 moveml %sp@,%d1-%d5/%a0-%a2
189 moveml %d1-%d5/%a0-%a2,%sp@-
196 moveml %d1-%d5/%a0-%a2,%sp@-
200 moveml %sp@+,%a0-%a2/%d1-%d5
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| D | a.out-core.h | 46 dump->regs.d5 = regs->d5; in aout_dump_thread()
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| D | user.h | 40 long d1,d2,d3,d4,d5,d6,d7; member
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| D | elf.h | 85 pr_reg[4] = regs->d5; \
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| D | processor.h | 135 (_regs)->d5 = current->mm->start_data; \
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| /arch/m68k/ifpsp060/src/ |
| D | ilsp.S | 138 mov.l 0xc(%a6), %d5 # get dividend hi
155 tst.l %d5 # chk sign of hi(dividend)
161 negx.l %d5
167 tst.l %d5 # is (hi(dividend) == 0)
176 exg %d5,%d6 # q = 0, r = dividend
180 tdivu.l %d7, %d5:%d6 # it's only a 32/32 bit div!
201 neg.l %d5 # sgn(rem) = sgn(dividend)
275 # The most sig. longword of the 64 bit dividend must be in %d5, least #
278 # The quotient is returned in %d6, remainder in %d5, unless the #
299 swap %d5 # same as r*b if previous step rqd
[all …]
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| /arch/m68k/fpsp040/ |
| D | binstr.S | 26 | Copy the fraction in d2:d3 to d4:d5.
32 | A4. Multiply the fraction in d4:d5 by 2 using shifts. The msb
35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5
54 | d5: lower 32-bits of fraction for mul by 2
81 | A2. Copy d2:d3 to d4:d5. Start loop.
85 movel %d3,%d5 |to d4:d5
95 | A4. Multiply d4:d5 by 2; add carry out to d1.
97 asll #1,%d5 |mul d5 by 2
104 addl %d5,%d3 |add lower 32 bits
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| D | sgetem.S | 126 moveml %d3/%d5/%d6,-(%a7) |save registers
131 movel #32,%d5
132 subl %d3,%d5 |sub 32 from shift for ls mant
133 lsrl %d5,%d6 |shift off all bits but those that will
136 moveml (%a7)+,%d3/%d5/%d6 |restore registers
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| D | bindec.S | 117 | d5: LAMBDA/ICTR
228 | d5: x/x
271 | loop entry A6. The lower word of d5 is used for ICTR.
273 clrw %d5 |clear ICTR
291 | d5: ICTR/Unchanged
363 | d5: 0/ICTR:LAMBDA
387 swap %d5 |use upper word of d5 for LAMBDA
388 clrw %d5 |set it zero initially
392 addqw #1,%d5 |if neg, set LAMBDA true
403 addw %d5,%d1 |add in LAMBDA
[all …]
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| D | srem_mod.S | 117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y|
127 movel %d5,%d4
128 clrl %d5
142 movel %d5,%d7 | ...a copy of D5
143 lsll %d6,%d5
229 cmpl %d5,%d2 | ...compare lo(R) and lo(Y)
242 subl %d5,%d2 | ...lo(R) - lo(Y)
307 movel %d5,Y_Lo(%a6)
323 movel %d5,Y_Lo(%a6)
341 cmpl %d5,%d2
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| /arch/x86/lib/ |
| D | memcpy_32.c | 25 int d0,d1,d2,d3,d4,d5; in memmove() local
199 "=r" (d3),"=r" (d4), "=r"(d5) in memmove()
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| /arch/m68k/lib/ |
| D | mulsi3.S | 77 #define d5 REG (d5) macro
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| D | modsi3.S | 77 #define d5 REG (d5) macro
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| D | umodsi3.S | 77 #define d5 REG (d5) macro
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| D | divsi3.S | 77 #define d5 REG (d5) macro
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| D | udivsi3.S | 77 #define d5 REG (d5) macro
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| /arch/m68k/include/uapi/asm/ |
| D | ptrace.h | 34 long d5; member
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| /arch/m68k/kernel/ |
| D | head.S | 1664 movel #ROOT_TABLE_SIZE,%d5
1667 subql #1,%d5 | they (might) work
1669 1: tstl %d5
1671 subq #1,%d5
1728 movel %a4,%d5
1729 addil #PAGESIZE<<13,%d5
1740 movel %a4,%d5
1741 addil #PAGESIZE<<6,%d5
1752 movel %a4,%d5
1753 addil #PAGESIZE,%d5
[all …]
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| D | process.c | 96 regs->a0, regs->d5, regs->d4); in show_regs()
168 task_thread_info(p)->tp_value = frame->regs.d5; in copy_thread()
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| D | sys_m68k.c | 456 sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5, in sys_atomic_cmpxchg_32() argument
529 sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5, in sys_atomic_cmpxchg_32() argument
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| D | asm-offsets.c | 51 DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5)); in main()
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| D | ptrace.c | 54 [4] = PT_REG(d5),
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| /arch/m68k/mac/ |
| D | macints.c | 326 fp->d4, fp->d5, fp->a0, fp->a1); in mac_nmi_handler()
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| /arch/m68k/math-emu/ |
| D | fp_entry.S | 150 move.l %d5,%d0
203 | move.l %d0,%d5
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| /arch/m68k/platform/coldfire/ |
| D | entry.S | 128 moveml %sp@,%d1-%d5/%a0-%a2
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