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Searched refs:fpcr (Results 1 – 25 of 56) sorted by relevance

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/arch/mn10300/kernel/
Dfpu.c38 u32 fpcr; in fpu_exception() local
57 fpcr = tsk->thread.fpu_state.fpcr; in fpu_exception()
59 if (fpcr & FPCR_EC_Z) in fpu_exception()
61 else if (fpcr & FPCR_EC_O) in fpu_exception()
63 else if (fpcr & FPCR_EC_U) in fpu_exception()
65 else if (fpcr & FPCR_EC_I) in fpu_exception()
Dfpu-low.S51 fmov FPCR_INIT,fpcr
87 fmov fpcr,\dreg
125 fmov \dreg,fpcr
/arch/m68k/ifpsp060/src/
Dftest.S241 fmovm.l DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar
246 fmovm.l %fpcr,%fpsr,%fpiar,IFPCREGS(%a6)
259 fmovm.l %fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
281 fmovm.l DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar
286 fmovm.l %fpcr,%fpsr,%fpiar,IFPCREGS(%a6)
299 fmovm.l %fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
322 fmovm.l DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar
327 fmovm.l %fpcr,%fpsr,%fpiar,IFPCREGS(%a6)
336 fmovm.l %fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
359 fmovm.l DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar
[all …]
Dfplsp.S566 fmovm.l %fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
569 fmov.l &0x0,%fpcr # zero FPCR
613 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
623 fmovm.l %fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
626 fmov.l &0x0,%fpcr # zero FPCR
671 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
681 fmovm.l %fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
684 fmov.l &0x0,%fpcr # zero FPCR
729 fmovm.l USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
743 fmovm.l %fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
[all …]
/arch/alpha/include/asm/
Dfpu.h59 swcr_update_status(unsigned long swcr, unsigned long fpcr) in swcr_update_status() argument
65 swcr |= (fpcr >> 35) & IEEE_STATUS_MASK; in swcr_update_status()
/arch/arm64/include/asm/
Dfpsimd.h37 u32 fpcr; member
49 u32 fpcr; member
Dfpsimdmacros.h39 mrs x\tmpnr, fpcr
63 msr fpcr, x\tmpnr
70 mrs x\tmpnr2, fpcr
87 msr fpcr, x\tmpnr2
/arch/alpha/math-emu/
Dmath.c105 unsigned long res, va, vb, vc, swcr, fpcr; in alpha_fp_emul() local
117 fpcr = rdfpcr(); in alpha_fp_emul()
118 swcr = swcr_update_status(current_thread_info()->ieee_state, fpcr); in alpha_fp_emul()
122 mode = (fpcr >> FPCR_DYN_SHIFT) & 3; in alpha_fp_emul()
305 fpcr &= (~FPCR_MASK | FPCR_DYN_MASK); in alpha_fp_emul()
306 fpcr |= ieee_swcr_to_fpcr(swcr); in alpha_fp_emul()
307 wrfpcr(fpcr); in alpha_fp_emul()
/arch/powerpc/platforms/cell/spufs/
Dspu_restore.c132 vector unsigned int fpcr; in restore_fpcr() local
138 offset = LSCSA_QW_OFFSET(fpcr); in restore_fpcr()
139 fpcr = regs_spill[offset].v; in restore_fpcr()
140 spu_mtfpscr(fpcr); in restore_fpcr()
Dspu_save.c90 offset = LSCSA_QW_OFFSET(fpcr); in save_fpcr()
/arch/arm/nwfpe/
Dfpa11.inl43 return (fpa11->fpcr & ~MASK_RFC);
49 fpa11->fpcr &= ~MASK_WFC; /* clear SB, AB and DA bits */
50 fpa11->fpcr |= (reg & MASK_WFC); /* write SB, AB and DA bits */
Dfpa11.h82 /* 100 */ FPCR fpcr; /* floating point control register */ member
/arch/m68k/fpsp040/
Dsint.S199 fmovel %fpcr,-(%sp)
200 fmovel #0,%fpcr
204 fmovel (%sp)+,%fpcr
240 fmovel %fpcr,-(%sp)
241 fmovel #0,%fpcr
243 fmovel (%sp)+,%fpcr
Dslog2.S123 fmovel (%sp)+,%fpcr
136 fmovel (%sp)+,%fpcr
150 fmovel (%sp)+,%fpcr
172 fmovel %d1,%fpcr
180 fmovel (%sp)+,%fpcr
Dx_unfl.S50 fmoveml %fpcr/%fpsr/%fpiar,USER_FPCR(%a6)
75 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
110 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
129 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
136 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
Dssinh.S94 fmovel #0,%fpcr
107 fmovel %d1,%fpcr
129 fmovel (%sp)+,%fpcr
Dx_snan.S47 fmoveml %fpcr/%fpsr/%fpiar,USER_FPCR(%a6)
74 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
107 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
135 fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
Dsacos.S58 fmovel %d1,%fpcr | ...load user's rounding mode/precision
/arch/arm64/include/uapi/asm/
Dsigcontext.h52 __u32 fpcr; member
Dptrace.h78 __u32 fpcr; member
/arch/mn10300/include/uapi/asm/
Dsigcontext.h17 unsigned long fpcr; /* fpu control register */ member
/arch/arm/include/asm/
Duser.h44 unsigned int fpcr:32; member
/arch/alpha/kernel/
Dptrace.c131 unsigned long fpcr = *get_reg_addr(task, regno); in get_reg() local
134 swcr = swcr_update_status(swcr, fpcr); in get_reg()
135 return fpcr | swcr; in get_reg()
/arch/arm64/kernel/
Dsignal.c59 __put_user_error(fpsimd->fpcr, &ctx->fpcr, err); in preserve_fpsimd_context()
86 __get_user_error(fpsimd.fpcr, &ctx->fpcr, err); in restore_fpsimd_context()
/arch/mn10300/include/asm/
Dprocessor.h91 unsigned long fpcr; /* fpu control register */ member

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