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Searched refs:lch (Results 1 – 4 of 4) sorted by relevance

/arch/arm/plat-omap/
Ddma.c133 static inline void disable_lnk(int lch);
134 static void omap_disable_channel_irq(int lch);
135 static inline void omap_enable_channel_irq(int lch);
177 void omap_set_dma_priority(int lch, int dst_port, int priority) in omap_set_dma_priority() argument
209 void omap_set_dma_priority(int lch, int dst_port, int priority) in omap_set_dma_priority() argument
213 ccr = p->dma_read(CCR, lch); in omap_set_dma_priority()
218 p->dma_write(ccr, CCR, lch); in omap_set_dma_priority()
223 void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, in omap_set_dma_transfer_params() argument
229 l = p->dma_read(CSDP, lch); in omap_set_dma_transfer_params()
232 p->dma_write(l, CSDP, lch); in omap_set_dma_transfer_params()
[all …]
/arch/arm/mach-omap2/
Ddma.c94 static inline void dma_write(u32 val, int reg, int lch) in dma_write() argument
100 offset = reg_map[reg] + (stride * lch); in dma_write()
104 static inline u32 dma_read(int reg, int lch) in dma_read() argument
110 offset = reg_map[reg] + (stride * lch); in dma_read()
115 static inline void omap2_disable_irq_lch(int lch) in omap2_disable_irq_lch() argument
119 val = dma_read(IRQENABLE_L0, lch); in omap2_disable_irq_lch()
120 val &= ~(1 << lch); in omap2_disable_irq_lch()
121 dma_write(val, IRQENABLE_L0, lch); in omap2_disable_irq_lch()
124 static void omap2_clear_dma(int lch) in omap2_clear_dma() argument
129 dma_write(0, i, lch); in omap2_clear_dma()
/arch/arm/mach-omap1/
Ddma.c184 static inline void dma_write(u32 val, int reg, int lch) in dma_write() argument
190 offset = reg_map[reg] + (stride * lch); in dma_write()
195 u32 offset2 = reg_map[reg] + 2 + (stride * lch); in dma_write()
200 static inline u32 dma_read(int reg, int lch) in dma_read() argument
206 offset = reg_map[reg] + (stride * lch); in dma_read()
212 u32 offset2 = reg_map[reg] + 2 + (stride * lch); in dma_read()
219 static void omap1_clear_lch_regs(int lch) in omap1_clear_lch_regs() argument
224 dma_write(0, i, lch); in omap1_clear_lch_regs()
227 static void omap1_clear_dma(int lch) in omap1_clear_dma() argument
231 l = dma_read(CCR, lch); in omap1_clear_dma()
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/arch/arm/mach-davinci/
Ddma.c314 setup_dma_interrupt(unsigned lch, in setup_dma_interrupt() argument
320 ctlr = EDMA_CTLR(lch); in setup_dma_interrupt()
321 lch = EDMA_CHAN_SLOT(lch); in setup_dma_interrupt()
324 edma_shadow0_write_array(ctlr, SH_IECR, lch >> 5, in setup_dma_interrupt()
325 BIT(lch & 0x1f)); in setup_dma_interrupt()
327 edma_cc[ctlr]->intr_data[lch].callback = callback; in setup_dma_interrupt()
328 edma_cc[ctlr]->intr_data[lch].data = data; in setup_dma_interrupt()
331 edma_shadow0_write_array(ctlr, SH_ICR, lch >> 5, in setup_dma_interrupt()
332 BIT(lch & 0x1f)); in setup_dma_interrupt()
333 edma_shadow0_write_array(ctlr, SH_IESR, lch >> 5, in setup_dma_interrupt()
[all …]