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Searched refs:lval (Results 1 – 2 of 2) sorted by relevance

/arch/mips/kernel/
Dunaligned.c1333 unsigned long uninitialized_var(lval), uninitialized_var(lval2);
1337 …(".set push\n.set hardfloat\nmfc1\t%0,$0\n\tmfhc1\t%1,$0\n.set pop":"=r"(lval2),"=r"(lval)); break;
1338 …(".set push\n.set hardfloat\nmfc1\t%0,$1\n\tmfhc1\t%1,$1\n.set pop":"=r"(lval2),"=r"(lval)); break;
1339 …(".set push\n.set hardfloat\nmfc1\t%0,$2\n\tmfhc1\t%1,$2\n.set pop":"=r"(lval2),"=r"(lval)); break;
1340 …(".set push\n.set hardfloat\nmfc1\t%0,$3\n\tmfhc1\t%1,$3\n.set pop":"=r"(lval2),"=r"(lval)); break;
1341 …(".set push\n.set hardfloat\nmfc1\t%0,$4\n\tmfhc1\t%1,$4\n.set pop":"=r"(lval2),"=r"(lval)); break;
1342 …(".set push\n.set hardfloat\nmfc1\t%0,$5\n\tmfhc1\t%1,$5\n.set pop":"=r"(lval2),"=r"(lval)); break;
1343 …(".set push\n.set hardfloat\nmfc1\t%0,$6\n\tmfhc1\t%1,$6\n.set pop":"=r"(lval2),"=r"(lval)); break;
1344 …(".set push\n.set hardfloat\nmfc1\t%0,$7\n\tmfhc1\t%1,$7\n.set pop":"=r"(lval2),"=r"(lval)); break;
1345 …(".set push\n.set hardfloat\nmfc1\t%0,$8\n\tmfhc1\t%1,$8\n.set pop":"=r"(lval2),"=r"(lval)); break;
[all …]
/arch/ia64/kernel/
Dperfmon.c248 unsigned long lval; /* last reset value */ member
2745 reg->lval = val; in pfm_new_counter_value()
3157 ctx->ctx_pmds[cnum].lval = value; in pfm_write_pmds()
3276 unsigned long val = 0UL, lval, ovfl_mask, sval; in pfm_read_pmds() local
3343 lval = ctx->ctx_pmds[cnum].lval; in pfm_read_pmds()
3393 req->reg_last_reset_val = lval; in pfm_read_pmds()
5299 ovfl_arg->pmd_last_reset = ctx->ctx_pmds[i].lval; in pfm_overflow_handler()