Searched refs:mer (Results 1 – 5 of 5) sorted by relevance
| /arch/mips/dec/ |
| D | kn02xa-berr.c | 32 volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER); in dec_kn02xa_be_ack() local
35 *mer = KN02CA_MER_INTR; /* Clear errors; keep the ARC IRQ. */ in dec_kn02xa_be_ack()
59 u32 mer = *kn02xa_mer; in dec_kn02xa_be_backend() local
92 (mer & KN02XA_MER_BYTERR) >> 8, in dec_kn02xa_be_backend()
93 lanestat[(mer & KN02XA_MER_BYTERR_3) != 0], in dec_kn02xa_be_backend()
94 lanestat[(mer & KN02XA_MER_BYTERR_2) != 0], in dec_kn02xa_be_backend()
95 lanestat[(mer & KN02XA_MER_BYTERR_1) != 0], in dec_kn02xa_be_backend()
96 lanestat[(mer & KN02XA_MER_BYTERR_0) != 0]); in dec_kn02xa_be_backend()
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| /arch/powerpc/sysdev/ |
| D | mpic_msgr.c | 37 out_be32(msgr->mer, value); in _mpic_msgr_mer_write()
42 return in_be32(msgr->mer); in _mpic_msgr_mer_read()
47 u32 mer = _mpic_msgr_mer_read(msgr); in _mpic_msgr_disable() local
49 _mpic_msgr_mer_write(msgr, mer & ~(1 << msgr->num)); in _mpic_msgr_disable()
87 u32 mer; in mpic_msgr_enable() local
90 mer = _mpic_msgr_mer_read(msgr); in mpic_msgr_enable()
91 _mpic_msgr_mer_write(msgr, mer | (1 << msgr->num)); in mpic_msgr_enable()
234 msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET); in mpic_msgr_probe()
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| /arch/m68k/q40/ |
| D | q40ints.c | 207 unsigned mir, mer; in q40_irq_handler() local
230 mer = master_inb(EIRQ_REG); in q40_irq_handler()
232 if (mer & eirqs[i].mask) { in q40_irq_handler()
283 if (mer && ccleirq > 0 && !aliased_irq) { in q40_irq_handler()
284 printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer); in q40_irq_handler()
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| /arch/powerpc/include/asm/ |
| D | mpic_msgr.h | 21 u32 __iomem *mer; member
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| /arch/powerpc/kernel/ |
| D | sysfs.c | 260 SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
330 __ATTR(mer, 0600, show_mer, store_mer),
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