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Searched refs:mfc_sr1_RW (Results 1 – 7 of 7) sorted by relevance

/arch/powerpc/platforms/cell/
Dspu_priv1_mmio.c115 out_be64(&spu->priv1->mfc_sr1_RW, sr1); in mfc_sr1_set()
120 return in_be64(&spu->priv1->mfc_sr1_RW); in mfc_sr1_get()
Dbeat_spu_priv1.c113 offsetof(struct spu_priv1, mfc_sr1_RW), sr1); in mfc_sr1_set()
121 offsetof(struct spu_priv1, mfc_sr1_RW), &sr1); in mfc_sr1_get()
/arch/powerpc/platforms/cell/spufs/
Dbacking_ops.c314 sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_start()
315 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_start()
325 sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_stop()
326 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_stop()
Dswitch.c231 csa->priv1.mfc_sr1_RW = spu_mfc_sr1_get(spu); in save_mfc_sr1()
1708 spu_mfc_sr1_set(spu, csa->priv1.mfc_sr1_RW); in restore_mfc_sr1()
2163 csa->priv1.mfc_sr1_RW = MFC_STATE1_LOCAL_STORAGE_DECODE_MASK | in init_priv1()
/arch/powerpc/include/asm/
Dspu_csa.h136 u64 mfc_sr1_RW; member
Dspu.h490 u64 mfc_sr1_RW; /* 0x000 */ member
/arch/powerpc/platforms/ps3/
Dspu.c561 offsetof(struct spu_priv1, mfc_sr1_RW), in mfc_sr1_set()