Searched refs:mt7620_clk_divider (Results 1 – 1 of 1) sorted by relevance
27 static u32 mt7620_clk_divider[] = { 2, 3, 4, 8 }; variable159 cpu_rate = ((40 * (m + 24)) / mt7620_clk_divider[d]) * 1000000; in ralink_clk_init()