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/arch/sparc/kernel/
Ddevices.c32 static int check_cpu_node(phandle nd, int *cur_inst, in check_cpu_node() argument
36 if (!compare(nd, *cur_inst, compare_arg)) { in check_cpu_node()
38 *prom_node = nd; in check_cpu_node()
40 *mid = prom_getintdefault(nd, cpu_mid_prop(), 0); in check_cpu_node()
72 static int cpu_instance_compare(phandle nd, int instance, void *_arg) in cpu_instance_compare() argument
87 static int cpu_mid_compare(phandle nd, int instance, void *_arg) in cpu_mid_compare() argument
92 this_mid = prom_getintdefault(nd, cpu_mid_prop(), 0); in cpu_mid_compare()
/arch/arm/mach-exynos/
Dfirmware.c52 struct device_node *nd; in exynos_firmware_init() local
55 nd = of_find_compatible_node(NULL, NULL, in exynos_firmware_init()
57 if (!nd) in exynos_firmware_init()
60 addr = of_get_address(nd, 0, NULL, NULL); in exynos_firmware_init()
/arch/ia64/kernel/
Dcrash.c179 struct ia64_mca_notify_die *nd; in kdump_init_notifier() local
212 nd = (struct ia64_mca_notify_die *)args->err; in kdump_init_notifier()
217 if (kdump_on_init && (nd->sos->rv_rc != 1)) { in kdump_init_notifier()
224 if (kdump_on_init && (nd->sos->rv_rc != 1)) in kdump_init_notifier()
229 if (kdump_on_fatal_mca && !(*(nd->data))) { in kdump_init_notifier()
Dmca.c780 struct ia64_mca_notify_die nd = in ia64_mca_rendez_int_handler() local
786 NOTIFY_MCA(DIE_MCA_RENDZVOUS_ENTER, get_irq_regs(), (long)&nd, 1); in ia64_mca_rendez_int_handler()
794 NOTIFY_MCA(DIE_MCA_RENDZVOUS_PROCESS, get_irq_regs(), (long)&nd, 1); in ia64_mca_rendez_int_handler()
800 NOTIFY_MCA(DIE_MCA_RENDZVOUS_LEAVE, get_irq_regs(), (long)&nd, 1); in ia64_mca_rendez_int_handler()
1287 struct ia64_mca_notify_die nd = in ia64_mca_handler() local
1304 NOTIFY_MCA(DIE_MCA_MONARCH_ENTER, regs, (long)&nd, 1); in ia64_mca_handler()
1323 NOTIFY_MCA(DIE_MCA_MONARCH_PROCESS, regs, (long)&nd, 1); in ia64_mca_handler()
1349 NOTIFY_MCA(DIE_MCA_MONARCH_LEAVE, regs, (long)&nd, 1); in ia64_mca_handler()
1671 struct ia64_mca_notify_die nd = in ia64_init_handler() local
1674 NOTIFY_INIT(DIE_INIT_ENTER, regs, (long)&nd, 0); in ia64_init_handler()
[all …]
/arch/unicore32/mm/
Dproc-macros.S110 930: @ ---- handle 2nd page table
111 and \pa, \pa, \msk @ pa <- phys addr of 2nd pt
115 mov \off, \off >> #2 @ off <- index of 2nd pt
116 adr \tbl, 920f @ tbl <- table of 2nd pt
124 920: @ 2nd level page table
/arch/powerpc/platforms/powermac/
Dpci.c1158 struct device_node* nd; in pmac_pcibios_after_init() local
1160 for_each_node_by_name(nd, "firewire") { in pmac_pcibios_after_init()
1161 if (nd->parent && (of_device_is_compatible(nd, "pci106b,18") || in pmac_pcibios_after_init()
1162 of_device_is_compatible(nd, "pci106b,30") || in pmac_pcibios_after_init()
1163 of_device_is_compatible(nd, "pci11c1,5811")) in pmac_pcibios_after_init()
1164 && of_device_is_compatible(nd->parent, "uni-north")) { in pmac_pcibios_after_init()
1165 pmac_call_feature(PMAC_FTR_1394_ENABLE, nd, 0, 0); in pmac_pcibios_after_init()
1166 pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, nd, 0, 0); in pmac_pcibios_after_init()
1169 for_each_node_by_name(nd, "ethernet") { in pmac_pcibios_after_init()
1170 if (nd->parent && of_device_is_compatible(nd, "gmac") in pmac_pcibios_after_init()
[all …]
/arch/mips/cavium-octeon/
DKconfig14 bool "Build the kernel to be used as a 2nd kernel on the same chip"
18 address and use the 2nd uart for output. This allows a kernel built
72 bool "Lock the 2nd level interrupt handler in L2"
76 Lock the 2nd level interrupt handler in L2.
/arch/alpha/lib/
Dcsum_ipv6_magic.S50 or $1,$22,$1 # .. e1 : 2nd src word complete
63 or $3,$24,$3 # .. e1 : 2nd dst word complete
Dev6-csum_ipv6_magic.S89 or $1,$5,$1 # E : 2nd src word complete
100 or $3,$23,$3 # E : U L U L : 2nd dst word complete
Dev6-copy_user.S67 beq $3, $destaligned # .. U .. .. : 2nd (one cycle fetcher stall)
/arch/arm/boot/dts/
Dsh7372-mackerel.dts15 model = "Mackerel (AP4 EVM 2nd)";
Dbcm2835.dtsi58 * Since the BCM2835 only has 2 banks, the 2nd bank
/arch/powerpc/platforms/8xx/
DKconfig81 Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
82 (often 2-nd UART) will not work if this is enabled.
88 Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
89 (often 1-nd UART) will not work if this is enabled.
/arch/sparc/mm/
Dsrmmu.c1007 phandle nd; in init_vac_layout() local
1016 nd = prom_getchild(prom_root_node); in init_vac_layout()
1017 while ((nd = prom_getsibling(nd)) != 0) { in init_vac_layout()
1018 prom_getstring(nd, "device_type", node_str, sizeof(node_str)); in init_vac_layout()
1020 vac_line_size = prom_getint(nd, "cache-line-size"); in init_vac_layout()
1025 cache_lines = prom_getint(nd, "cache-nlines"); in init_vac_layout()
1046 if (nd == 0) { in init_vac_layout()
/arch/m68k/fpsp040/
Dbugfix.S214 bfextu CMDREG2B(%a6){#6:#3},%d1 |get 2nd dest
215 cmpb %d0,%d1 |cmp 1st dest with 2nd dest
218 cmpb %d0,%d1 |cmp 1st src with 2nd dest
364 bfextu CMDREG2B(%a6){#6:#3},%d1 |get 2nd dest
365 cmpb %d0,%d1 |cmp 1st dest with 2nd dest
/arch/powerpc/boot/dts/
Dpcm030.dts93 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
Dmedia5200.dts93 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot
Dlite5200b.dts116 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
Dpcm032.dts92 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
/arch/x86/mm/
Dnuma.c193 void *nd; in setup_node_data() local
218 nd = __va(nd_pa); in setup_node_data()
227 node_data[nid] = nd; in setup_node_data()
/arch/arm/boot/compressed/
Dhead-sharpsl.S50 mov r6, #0x30 @ Load 2nd Magic Init value
/arch/powerpc/platforms/cell/spufs/
Dspufs.h251 long spufs_create(struct path *nd, struct dentry *dentry, unsigned int flags,
/arch/m68k/ifpsp060/src/
Dilsp.S81 # remainder is in first longword, quotient is in 2nd. #
312 mov.w %d5, %d1 # 2nd quotient 'digit'
413 swap %d3 # aligned with 2nd word of dividend
429 # add 2nd word to quotient, get the remainder.
/arch/sh/kernel/cpu/sh5/
Dswitchto.S132 ld.l r4, 4, r9 ! next->thread_info (2nd element of next task_struct)
/arch/mips/kernel/
Dbranch.c178 if (inst.rr.nd) in __MIPS16e_compute_return_epc()

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