Searched refs:new_div (Results 1 – 3 of 3) sorted by relevance
| /arch/arm/mach-omap2/ |
| D | clkt_clksel.c | 230 u32 *new_div) in omap2_clksel_round_rate_div() argument
250 *new_div = 1; in omap2_clksel_round_rate_div()
279 *new_div = clkr->div; in omap2_clksel_round_rate_div()
281 pr_debug("clock: new_div = %d, new_rate = %ld\n", *new_div, in omap2_clksel_round_rate_div()
392 u32 new_div; in omap2_clksel_round_rate() local
394 return omap2_clksel_round_rate_div(clk, target_rate, &new_div); in omap2_clksel_round_rate()
416 u32 field_val, validrate, new_div = 0; in omap2_clksel_set_rate() local
421 validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); in omap2_clksel_set_rate()
425 field_val = _divisor_to_clksel(clk, new_div); in omap2_clksel_set_rate()
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| D | clkt34xx_dpll3m2.c | 51 u32 new_div = 0; in omap3_core_dpll_m2_set_rate() local
63 validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); in omap3_core_dpll_m2_set_rate()
106 new_div, unlock_dll, c, rate > clkrate, in omap3_core_dpll_m2_set_rate()
113 new_div, unlock_dll, c, rate > clkrate, in omap3_core_dpll_m2_set_rate()
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| D | clock.h | 386 u32 *new_div);
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