/arch/sh/drivers/pci/ |
D | fixups-rts7751r2d.c | 48 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic() 51 pci_write_reg(chan, 0x0000c3ff, SH4_PCIINTM); in pci_fixup_pcic() 52 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM); in pci_fixup_pcic() 54 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1); in pci_fixup_pcic() 55 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4); in pci_fixup_pcic() 59 pci_write_reg(chan, mcr, SH4_PCIMCR); in pci_fixup_pcic() 61 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5); in pci_fixup_pcic() 62 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6); in pci_fixup_pcic() 63 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0); in pci_fixup_pcic() 64 pci_write_reg(chan, 0x00000000, SH4_PCILAR1); in pci_fixup_pcic()
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D | pci-sh7751.c | 34 pci_write_reg(chan, word, SH4_PCIBCR1); in __area_sdram_check() 43 pci_write_reg(chan, word, SH4_PCIBCR2); in __area_sdram_check() 102 pci_write_reg(chan, 0, SH4_PCICLKR); in sh7751_pci_init() 105 pci_write_reg(chan, word, SH4_PCIPINT); in sh7751_pci_init() 113 pci_write_reg(chan, word, SH7751_PCICONF1); in sh7751_pci_init() 117 pci_write_reg(chan, word, SH7751_PCICONF2); in sh7751_pci_init() 123 pci_write_reg(chan, word, SH4_PCILSR0); in sh7751_pci_init() 126 pci_write_reg(chan, word, SH4_PCILAR0); in sh7751_pci_init() 127 pci_write_reg(chan, word, SH7751_PCICONF5); in sh7751_pci_init() 134 pci_write_reg(chan, word , SH4_PCIMBR); in sh7751_pci_init() [all …]
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D | pcie-sh7786.c | 190 pci_write_reg(chan, data, SH4A_PCIEPHYDOUTR); in phy_write_reg() 191 pci_write_reg(chan, phyaddr, SH4A_PCIEPHYADRR); in phy_write_reg() 196 pci_write_reg(chan, 0, SH4A_PCIEPHYDOUTR); in phy_write_reg() 197 pci_write_reg(chan, 0, SH4A_PCIEPHYADRR); in phy_write_reg() 294 pci_write_reg(chan, 1, SH4A_PCIESRSTR); in pcie_reset() 295 pci_write_reg(chan, 0, SH4A_PCIETCTLR); in pcie_reset() 296 pci_write_reg(chan, 0, SH4A_PCIESRSTR); in pcie_reset() 297 pci_write_reg(chan, 0, SH4A_PCIETXVC0SR); in pcie_reset() 316 pci_write_reg(chan, PCI_CLASS_BRIDGE_PCI << 16, SH4A_PCIEIDSETR1); in pcie_init() 328 pci_write_reg(chan, data, SH4A_PCIEEXPCAP0); in pcie_init() [all …]
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D | fixups-landisk.c | 47 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic() 51 pci_write_reg(chan, mcr, SH4_PCIMCR); in pci_fixup_pcic() 53 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5); in pci_fixup_pcic() 54 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6); in pci_fixup_pcic() 55 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0); in pci_fixup_pcic() 56 pci_write_reg(chan, 0x00000000, SH4_PCILAR1); in pci_fixup_pcic()
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D | ops-sh7786.c | 56 pci_write_reg(chan, *data, PCI_REG(reg)); in sh7786_pcie_config_access() 64 pci_write_reg(chan, pci_read_reg(chan, SH4A_PCIEERRFR), SH4A_PCIEERRFR); in sh7786_pcie_config_access() 67 pci_write_reg(chan, (bus->number << 24) | (dev << 19) | in sh7786_pcie_config_access() 71 pci_write_reg(chan, (1 << 31) | (type << 8), SH4A_PCIEPCTLR); in sh7786_pcie_config_access() 84 pci_write_reg(chan, *data, SH4A_PCIEPDR); in sh7786_pcie_config_access() 87 pci_write_reg(chan, 0, SH4A_PCIEPCTLR); in sh7786_pcie_config_access()
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D | ops-sh4.c | 37 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); in sh4_pci_read() 72 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); in sh4_pci_write() 94 pci_write_reg(chan, data, SH4_PCIPDR); in sh4_pci_write()
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D | pci-sh4.h | 177 static inline void pci_write_reg(struct pci_channel *chan, in pci_write_reg() function
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D | pcie-sh7786.h | 572 pci_write_reg(struct pci_channel *chan, unsigned long val, unsigned long reg) in pci_write_reg() function
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