Searched refs:pll1_clk (Results 1 – 6 of 6) sorted by relevance
/arch/arm/mach-davinci/ |
D | dm646x.c | 75 static struct clk pll1_clk = { variable 84 .parent = &pll1_clk, 91 .parent = &pll1_clk, 98 .parent = &pll1_clk, 105 .parent = &pll1_clk, 112 .parent = &pll1_clk, 119 .parent = &pll1_clk, 126 .parent = &pll1_clk, 133 .parent = &pll1_clk, 140 .parent = &pll1_clk, [all …]
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D | dm365.c | 73 static struct clk pll1_clk = { variable 82 .parent = &pll1_clk, 88 .parent = &pll1_clk, 95 .parent = &pll1_clk, 101 .parent = &pll1_clk, 108 .parent = &pll1_clk, 115 .parent = &pll1_clk, 122 .parent = &pll1_clk, 129 .parent = &pll1_clk, 136 .parent = &pll1_clk, [all …]
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D | dm644x.c | 60 static struct clk pll1_clk = { variable 69 .parent = &pll1_clk, 76 .parent = &pll1_clk, 83 .parent = &pll1_clk, 90 .parent = &pll1_clk, 97 .parent = &pll1_clk, 103 .parent = &pll1_clk, 289 CLK(NULL, "pll1", &pll1_clk),
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D | dm355.c | 64 static struct clk pll1_clk = { variable 73 .parent = &pll1_clk, 79 .parent = &pll1_clk, 86 .parent = &pll1_clk, 93 .parent = &pll1_clk, 100 .parent = &pll1_clk, 107 .parent = &pll1_clk, 342 CLK(NULL, "pll1", &pll1_clk),
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D | da850.c | 136 static struct clk pll1_clk = { variable 145 .parent = &pll1_clk, 151 .parent = &pll1_clk, 158 .parent = &pll1_clk, 440 CLK(NULL, "pll1", &pll1_clk),
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/arch/arm/mach-shmobile/ |
D | clock-sh73a0.c | 128 static struct clk pll1_clk = { variable 160 SH_FIXED_RATIO_CLK(pll1_div2_clk, pll1_clk, div2); 161 SH_FIXED_RATIO_CLK(pll1_div7_clk, pll1_clk, div7); 162 SH_FIXED_RATIO_CLK(pll1_div13_clk, pll1_clk, div13); 180 &pll1_clk, 227 SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags)
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