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/arch/mips/ath79/
Dclock.c171 static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, in ar934x_get_pll_freq() argument
179 do_div(t, ref_div); in ar934x_get_pll_freq()
184 do_div(t, ref_div * frac); in ar934x_get_pll_freq()
193 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; in ar934x_clocks_init() local
214 ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) & in ar934x_clocks_init()
221 ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & in ar934x_clocks_init()
230 cpu_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint, in ar934x_clocks_init()
241 ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) & in ar934x_clocks_init()
248 ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & in ar934x_clocks_init()
257 ddr_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint, in ar934x_clocks_init()
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