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Searched refs:soc_info (Results 1 – 23 of 23) sorted by relevance

/arch/arm/mach-davinci/
Dcommon.c41 static int __init davinci_init_id(struct davinci_soc_info *soc_info) in davinci_init_id() argument
49 base = ioremap(soc_info->jtag_id_reg, SZ_4K); in davinci_init_id()
55 soc_info->jtag_id = __raw_readl(base); in davinci_init_id()
58 variant = (soc_info->jtag_id & 0xf0000000) >> 28; in davinci_init_id()
59 part_no = (soc_info->jtag_id & 0x0ffff000) >> 12; in davinci_init_id()
61 for (i = 0, dip = soc_info->ids; i < soc_info->ids_num; in davinci_init_id()
65 soc_info->cpu_id = dip->cpu_id; in davinci_init_id()
71 pr_err("Unknown DaVinci JTAG ID 0x%x\n", soc_info->jtag_id); in davinci_init_id()
75 void __init davinci_common_init(struct davinci_soc_info *soc_info) in davinci_common_init() argument
79 if (!soc_info) { in davinci_common_init()
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Dpsc.c35 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_psc_is_clk_active() local
37 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { in davinci_psc_is_clk_active()
39 (int)soc_info->psc_bases, ctlr); in davinci_psc_is_clk_active()
43 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); in davinci_psc_is_clk_active()
56 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_psc_reset() local
58 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { in davinci_psc_reset()
60 (int)soc_info->psc_bases, ctlr); in davinci_psc_reset()
64 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); in davinci_psc_reset()
82 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_psc_config() local
85 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { in davinci_psc_config()
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Dmux.c33 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_cfg_reg() local
39 if (WARN_ON(!soc_info->pinmux_pins)) in davinci_cfg_reg()
43 pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K); in davinci_cfg_reg()
48 if (index >= soc_info->pinmux_pins_num) { in davinci_cfg_reg()
50 index, soc_info->pinmux_pins_num); in davinci_cfg_reg()
55 cfg = &soc_info->pinmux_pins[index]; in davinci_cfg_reg()
Dserial.c78 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_serial_setup_clk() local
79 struct device *dev = &soc_info->serial_dev->dev; in davinci_serial_setup_clk()
100 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_serial_init() local
101 struct device *dev = &soc_info->serial_dev->dev; in davinci_serial_init()
129 return platform_device_register(soc_info->serial_dev); in davinci_serial_init()
Dtime.c123 struct davinci_soc_info *soc_info = &davinci_soc_info; in timer32_config() local
127 soc_info->timer_info->timers; in timer32_config()
201 struct davinci_soc_info *soc_info = &davinci_soc_info; in timer_init() local
202 struct davinci_timer_instance *dtip = soc_info->timer_info->timers; in timer_init()
343 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_timer_init() local
350 clockevent_id = soc_info->timer_info->clockevent_id; in davinci_timer_init()
351 clocksource_id = soc_info->timer_info->clocksource_id; in davinci_timer_init()
363 soc_info->timer_info->timers; in davinci_timer_init()
Dboard-mityomapl138.c119 struct davinci_soc_info *soc_info = &davinci_soc_info; in read_factory_config() local
142 memcpy(soc_info->emac_pdata->mac_addr, in read_factory_config()
463 struct davinci_soc_info *soc_info = &davinci_soc_info; in mityomapl138_config_emac() local
465 soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */ in mityomapl138_config_emac()
470 if (soc_info->emac_pdata->rmii_en) { in mityomapl138_config_emac()
488 soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID; in mityomapl138_config_emac()
Dboard-sffsdr.c139 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_sffsdr_init() local
145 soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID; in davinci_sffsdr_init()
Dboard-neuros-osd2.c176 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_ntosd2_init() local
203 soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID; in davinci_ntosd2_init()
Dboard-omapl138-hawk.c45 struct davinci_soc_info *soc_info = &davinci_soc_info; in omapl138_hawk_config_emac() local
59 soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; in omapl138_hawk_config_emac()
Dboard-da830-evm.c595 struct davinci_soc_info *soc_info = &davinci_soc_info; in da830_evm_init() local
615 soc_info->emac_pdata->rmii_en = 1; in da830_evm_init()
616 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; in da830_evm_init()
Dboard-da850-evm.c365 struct davinci_soc_info *soc_info = &davinci_soc_info; in da850_evm_setup_emac_rmii() local
367 soc_info->emac_pdata->rmii_en = 1; in da850_evm_setup_emac_rmii()
1039 struct davinci_soc_info *soc_info = &davinci_soc_info; in da850_evm_config_emac() local
1040 u8 rmii_en = soc_info->emac_pdata->rmii_en; in da850_evm_config_emac()
1081 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; in da850_evm_config_emac()
Dboard-dm365-evm.c690 struct davinci_soc_info *soc_info = &davinci_soc_info; in evm_init_cpld() local
698 soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID; in evm_init_cpld()
Dboard-dm644x-evm.c761 struct davinci_soc_info *soc_info = &davinci_soc_info; in davinci_evm_init() local
800 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID; in davinci_evm_init()
Dboard-dm646x-evm.c792 struct davinci_soc_info *soc_info = &davinci_soc_info; in evm_init() local
809 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID; in evm_init()
/arch/mips/lantiq/
Dprom.c31 static struct ltq_soc_info soc_info; variable
35 return soc_info.sys_type; in get_system_type()
95 ltq_soc_detect(&soc_info); in prom_init()
96 snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s", in prom_init()
97 soc_info.name, soc_info.rev_type); in prom_init()
98 soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0'; in prom_init()
99 pr_info("SoC: %s\n", soc_info.sys_type); in prom_init()
115 strncpy(of_ids[0].compatible, soc_info.compatible, in plat_of_setup()
/arch/mips/ralink/
Dof.c90 if (soc_info.mem_size) in plat_mem_setup()
91 add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M, in plat_mem_setup()
94 detect_memory_region(soc_info.mem_base, in plat_mem_setup()
95 soc_info.mem_size_min * SZ_1M, in plat_mem_setup()
96 soc_info.mem_size_max * SZ_1M); in plat_mem_setup()
107 strncpy(of_ids[0].compatible, soc_info.compatible, len); in plat_of_setup()
Dmt7620.c182 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
196 soc_info->compatible = "ralink,mt7620n-soc"; in prom_soc_init()
199 soc_info->compatible = "ralink,mt7620a-soc"; in prom_soc_init()
206 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
217 soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN; in prom_soc_init()
218 soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX; in prom_soc_init()
222 soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; in prom_soc_init()
223 soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; in prom_soc_init()
227 soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN; in prom_soc_init()
228 soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX; in prom_soc_init()
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Drt305x.c242 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
260 soc_info->compatible = "ralink,rt3050-soc"; in prom_soc_init()
264 soc_info->compatible = "ralink,rt3052-soc"; in prom_soc_init()
269 soc_info->compatible = "ralink,rt3350-soc"; in prom_soc_init()
273 soc_info->compatible = "ralink,rt3352-soc"; in prom_soc_init()
277 soc_info->compatible = "ralink,rt5350-soc"; in prom_soc_init()
284 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
290 soc_info->mem_base = RT305X_SDRAM_BASE; in prom_soc_init()
292 soc_info->mem_size = rt5350_get_mem_size(); in prom_soc_init()
294 soc_info->mem_size_min = RT305X_MEM_SIZE_MIN; in prom_soc_init()
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Drt288x.c115 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
128 soc_info->compatible = "ralink,r2880-soc"; in prom_soc_init()
134 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
140 soc_info->mem_base = RT2880_SDRAM_BASE; in prom_soc_init()
141 soc_info->mem_size_min = RT2880_MEM_SIZE_MIN; in prom_soc_init()
142 soc_info->mem_size_max = RT2880_MEM_SIZE_MAX; in prom_soc_init()
Dprom.c20 struct ralink_soc_info soc_info; variable
24 return soc_info.sys_type; in get_system_type()
60 prom_soc_init(&soc_info); in prom_init()
Drt3883.c218 void prom_soc_init(struct ralink_soc_info *soc_info) in prom_soc_init() argument
231 soc_info->compatible = "ralink,rt3883-soc"; in prom_soc_init()
237 snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN, in prom_soc_init()
243 soc_info->mem_base = RT3883_SDRAM_BASE; in prom_soc_init()
244 soc_info->mem_size_min = RT3883_MEM_SIZE_MIN; in prom_soc_init()
245 soc_info->mem_size_max = RT3883_MEM_SIZE_MAX; in prom_soc_init()
Dcommon.h42 extern struct ralink_soc_info soc_info;
49 extern void prom_soc_init(struct ralink_soc_info *soc_info);
/arch/arm/mach-davinci/include/mach/
Dcommon.h82 extern void davinci_common_init(struct davinci_soc_info *soc_info);