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Searched refs:t_psr (Results 1 – 4 of 4) sorted by relevance

/arch/sparc/kernel/
Drtrap_32.S17 #define t_psr l0 macro
52 andcc %t_psr, PSR_PS, %g0
55 andn %t_psr, %g1, %t_psr
57 wr %t_psr, 0x0, %psr
74 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
86 andn %t_psr, %g1, %t_psr
87 wr %t_psr, 0x0, %psr
95 wr %t_psr, PSR_ET, %psr
139 LOAD_PT_PRIV(sp, t_psr, t_pc, t_npc)
144 andn %t_psr, %g2, %t_psr
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Dwuf.S20 #define t_psr l0 macro
94 andcc %t_psr, PSR_PS, %g0
121 wr %t_psr, 0x0, %psr
176 STORE_PT_PRIV(sp, t_psr, t_pc, t_npc)
187 wr %t_psr, PSR_ET, %psr ! enable traps
213 wr %t_psr, 0x0, %psr
299 wr %t_psr, 0x0, %psr
Dwof.S33 #define t_psr l0 /* %psr at trap time T */ macro
94 andcc %t_psr, PSR_PS, %g0
121 wr %t_psr, 0x0, %psr ! restore condition codes in %psr
190 wr %t_psr, 0x0, %psr
245 STORE_PT_ALL(sp, t_psr, t_pc, t_npc, g1)
252 wr %t_psr, PSR_ET, %psr
285 wr %t_psr, 0x0, %psr
Detrap_32.S19 #define t_psr l0 /* Set by caller */ macro
82 andcc %t_psr, PSR_PS, %g0 ! fromsupv_p = (psr & PSR_PS)
84 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
90 STORE_PT_ALL(t_kstack, t_psr, t_pc, t_npc, g2)
141 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
144 STORE_PT_ALL(t_kstack, t_psr, t_pc, t_npc, g2)