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/arch/arm/mach-footbridge/include/mach/
Dentry-macro.S28 tst \irqstat, #IRQ_MASK_SDRAMPARITY
31 tst \irqstat, #IRQ_MASK_UART_RX
35 tst \irqstat, #IRQ_MASK_DMA1
39 tst \irqstat, #IRQ_MASK_DMA2
43 tst \irqstat, #IRQ_MASK_IN0
47 tst \irqstat, #IRQ_MASK_IN1
51 tst \irqstat, #IRQ_MASK_IN2
55 tst \irqstat, #IRQ_MASK_IN3
59 tst \irqstat, #IRQ_MASK_PCI
63 tst \irqstat, #IRQ_MASK_DOORBELLHOST
[all …]
/arch/sh/lib/
Dstrlen.S15 tst r0,r0
26 tst r1,r1
31 tst r1,r1
36 tst r1,r1
55 tst r0,r0
60 tst r0,r0
65 tst r0,r0
/arch/arm/mach-ebsa110/include/mach/
Dentry-macro.S22 tst \stat, #15
25 tst \stat, #3
28 tst \stat, #1
31 tst \stat, #1 @ bit 0 should be set
/arch/arm/lib/
Dcsumpartial.S41 tst buf, #1 @ odd address?
47 .Lless4: tst len, #6
67 tst len, #6
70 .Lless8_byte: tst len, #1 @ odd number of bytes
76 tst td0, #1 @ check buffer alignment
80 .Lnot_aligned: tst buf, #1 @ odd address
85 tst buf, #2 @ 32-bit aligned?
107 tst buf, #1
111 tst buf, #3 @ Test destination alignment
133 3: tst len, #0x1c @ should not change C
[all …]
Dmemset.S50 tst r2, #32
53 tst r2, #16
82 tst r8, #(1 << 30)
92 tst r2, #32
94 tst r2, #16
100 4: tst r2, #8
102 tst r2, #4
108 5: tst r2, #2
111 tst r2, #1
Dcsumpartialcopygeneric.S35 tst dst, #1
42 tst dst, #2
61 tst dst, #1 @ dst 16-bit aligned
69 tst len, #6
79 tst len, #6
82 tst len, #1
96 tst dst, #3 @ Test destination alignment
105 tst src, #3 @ Test source alignment
125 tst ip, #8
131 tst ip, #4
[all …]
Dmemzero.S63 tst r1, #32 @ 1
66 tst r1, #16 @ 1 16 bytes or more?
103 tst r1, #32
105 tst r1, #16
111 4: tst r1, #8 @ 1 8 bytes or more?
113 tst r1, #4 @ 1 4 bytes or more?
119 5: tst r1, #2 @ 1 2 bytes or more?
122 tst r1, #1 @ 1 a byte left over
Dio-readsw-armv3.S21 .Linsw_align: tst r1, #1
35 tst r1, #3
70 tst r2, #7
73 .Lno_insw_8: tst r2, #4
88 .Lno_insw_4: tst r2, #2
98 .Lno_insw_2: tst r2, #1
Dio-writesw-armv3.S21 .Loutsw_align: tst r1, #1
36 tst r1, #3
81 tst r2, #7
84 .Lno_outsw_8: tst r2, #4
105 .Lno_outsw_4: tst r2, #2
118 .Lno_outsw_2: tst r2, #1
/arch/arm/include/debug/
Dsamsung.S23 tst \rd, #S5PV210_UFSTAT_TXFULL
40 tst \rd, #S3C2440_UFSTAT_TXFULL
53 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
64 tst \rd, #S3C2410_UTRSTAT_TXFE
72 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
83 tst \rd, #S3C2410_UTRSTAT_TXFE
Dicedcc.S26 tst \rx, #0x20000000
36 tst \rx, #0x20000000
50 tst \rx, #0x10000000
60 tst \rx, #0x10000000
74 tst \rx, #2
85 tst \rx, #2
/arch/arm/mach-ks8695/include/mach/
Dentry-macro.S29 tst \irqstat, #0xff
38 tst \irqstat, #0x0f
41 tst \irqstat, #0x03
44 tst \irqstat, #0x01
/arch/arm/mach-sa1100/include/mach/
Dentry-macro.S22 tst \irqstat, #0xff
31 tst \irqstat, #0x0f
34 tst \irqstat, #0x03
37 tst \irqstat, #0x01
Ddebug-macro.S17 tst \rp, #1 @ MMU enabled?
28 tst \rv, #UTCR3_TXE
54 tst \rd, #UTSR1_TNF
60 tst \rd, #UTSR1_TBY
/arch/arm/kernel/
Drelocate_kernel.S24 tst r3,#1,0
30 tst r3,#2,0
37 tst r3,#4,0
43 tst r3,#8,0
/arch/arm/mm/
Dabort-macro.S13 tst \psr, #PSR_T_BIT
19 tst \tmp, #1 << 11 @ L = 0 -> write
33 tst \insn, #0x0e100000 @ [27:25,20] == 0
Dabort-lv4t.S18 tst r5, #PSR_T_BIT @ check for thumb mode
29 tst r8, #1 << 20 @ L = 1 -> write?
57 tst r8, #1 << 21 @ check writeback bit
73 tst r8, #1 << 23 @ Check U bit
80 tst r8, #1 << 21 @ Check writeback bit
84 tst r8, #1 << 22 @ if (immediate offset)
91 tst r8, #1 << 23 @ Check U bit
98 tst r8, #1 << 21 @ check writeback bit
105 tst r8, #1 << 23 @ Check U bit
112 tst r8, #1 << 21 @ check writeback bit
[all …]
Dproc-macros.S156 tst r1, #L_PTE_DIRTY|L_PTE_RDONLY
159 tst r1, #L_PTE_USER
167 tst r1, #L_PTE_XN
172 tst r1, #L_PTE_YOUNG
208 tst r3, #L_PTE_USER @ user?
211 tst r3, #L_PTE_RDONLY | L_PTE_DIRTY @ write and dirty?
214 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
219 tst r2, #PTE_CACHEABLE
250 tst r3, #L_PTE_USER @ user?
253 tst r3, #L_PTE_RDONLY | L_PTE_DIRTY @ write and dirty?
[all …]
Dproc-v7-2level.S84 tst r1, #1 << 4
88 tst r1, #L_PTE_RDONLY | L_PTE_DIRTY
91 tst r1, #L_PTE_USER
99 tst r1, #L_PTE_XN
102 tst r1, #L_PTE_YOUNG
/arch/arm/mach-at91/
Dpm_slowclock.S58 tst tmp1, #AT91_PMC_MCKRDY
72 tst tmp1, #AT91_PMC_MOSCS
86 tst tmp1, #AT91_PMC_LOCKA
100 tst tmp1, #AT91_PMC_LOCKB
236 tst tmp1, #(AT91_PMC_MUL & 0xff0000)
238 tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
248 tst tmp1, #(AT91_PMC_MUL & 0xff0000)
250 tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
264 tst tmp1, #AT91_PMC_PRES
/arch/arm/mach-imx/
Dssi-fiq.S52 tst r11, #SSI_SIER_TFE0_EN
57 tst r11, #SSI_SISR_TFE0
88 tst r11, #SSI_SIER_RFF0_EN
93 tst r11, #SSI_SISR_RFF0
105 tst r11, #SSI_SACNT_AC97EN
/arch/m68k/ifpsp060/src/
Ditest.S53 tst.l %d0
185 tst.b %d0
209 tst.b %d0
231 tst.b %d0
255 tst.b %d0
279 tst.b %d0
303 tst.b %d0
327 tst.b %d0
351 tst.b %d0
375 tst.b %d0
[all …]
/arch/arm/mach-msm/include/mach/
Ddebug-macro.S41 tst \rd, #0x08
45 tst \rd, #0x80
59 tst \rd, #0x04
/arch/arm/include/asm/hardware/
Ddebug-pl01x.S21 tst \rd, #UART01x_FR_TXFF
27 tst \rd, #UART01x_FR_BUSY
/arch/arm/mach-netx/include/mach/
Ddebug-macro.S28 tst \rd, #(1 << 3)
34 tst \rd, #(1 << 3)

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