Home
last modified time | relevance | path

Searched refs:we (Results 1 – 25 of 246) sorted by relevance

12345678910

/arch/cris/arch-v10/mm/
Dfault.c51 int miss, we, writeac; in handle_mmu_bus_fault() local
67 we = IO_EXTRACT(R_MMU_CAUSE, we_excp, cause); in handle_mmu_bus_fault()
71 regs->irp, address, miss, inv, we, acc, index, page_id)); in handle_mmu_bus_fault()
77 do_page_fault(address, regs, 1, we); in handle_mmu_bus_fault()
Dtlb.c54 IO_STATE(R_TLB_LO, we, no ) | in flush_tlb_all()
90 IO_STATE(R_TLB_LO, we, no ) | in flush_tlb_mm()
130 IO_STATE(R_TLB_LO, we, no ) | in flush_tlb_page()
/arch/frv/kernel/
Dbreak.S83 # traps will be enabled, so we have to do this now
92 # determine whether we have stepped through into an exception
93 # - we need to take special action to suspend h/w single stepping if we've done
273 # do the bit we had to skip
305 # we single-stepped into an interrupt handler whilst interrupts were merely virtually disabled
334 # we stepped through into the virtual interrupt reenablement trap
336 # we also want to single step anyway, but after fixing up so that we get an event on the
381 # do the bit we had to skip
412 # we'll want to try the trap stub again
427 # we'll swap the real return address for one with a BREAK insn so that we can re-enable
[all …]
Dentry.S155 # make sure we (the kernel) get div-zero and misalignment exceptions
598 # now that we've accessed the exception regs, we can enable exceptions
623 # now that we've accessed the exception regs, we can enable exceptions
651 # now that we've accessed the exception regs, we can enable exceptions
671 # now that we've accessed the exception regs, we can enable exceptions
690 # now that we've accessed the exception regs, we can enable exceptions
712 # now that we've accessed the exception regs, we can enable exceptions
738 # now that we've accessed the exception regs, we can enable exceptions
758 # now that we've accessed the exception regs, we can enable exceptions
777 # now that we've accessed the exception regs, we can enable exceptions
[all …]
/arch/x86/realmode/rm/
Dtrampoline_32.S42 movl tr_start, %eax # where we need to go
45 # write marker for master knows we're running
Dtrampoline_64.S52 # write marker for master knows we're running
116 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
/arch/x86/kernel/acpi/
Dwakeup_32.S20 # reload the gdt, as we need the full 32 bit address
36 # jump to place where we left off
79 # In case of S3 failure, we'll emerge here. Jump
/arch/mn10300/mm/
Dcache-inv-by-tag.S123 # If we are in writeback mode we check the start and end alignments,
240 # approx every N steps we re-enable the cache and see if there are any
242 # we also break out if we've reached the end of the loop
263 # - we don't bother with delay NOPs as we'll have enough instructions
264 # before we disable interrupts again to give the interrupts a chance
Dcache-inv-by-reg.S115 # If we are in writeback mode we check the start and end alignments,
136 # writeback mode, in which case we would be in flush and invalidate by
/arch/cris/boot/rescue/
Dhead_v10.S71 ;; sector. Sector size is 65536 bytes in all flashes we use.
77 ;; That is not where we put our downloaded serial boot-code.
123 ;; Since etrax actually starts at address 2 when booting from flash, we
124 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
135 ;; We put a longword of -1 here and if it is not -1, we jump using
136 ;; the value as jump target. Since we can always change 1's to 0's
157 ;; We need to setup the bus registers before we start using the DRAM
160 ;; we now should go through the checksum-table and check the listed
232 ;; (so we can flash LEDs, and so that DTR and others are set)
289 ;; check if we got something on the serial port
[all …]
Dkimagerescue.S48 ;; since etrax actually starts at address 2 when booting from flash, we
49 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
55 ;; (so we can flash LEDs, and so that DTR and others are set)
67 ;; We need to setup the bus registers before we start using the DRAM
125 ;; check if we got something on the serial port
/arch/arm/boot/dts/
Domap3430-sdp.dts69 gpmc,we-on-ns = <54>;
70 gpmc,we-off-ns = <168>;
117 gpmc,we-on-ns = <6>;
118 gpmc,we-off-ns = <30>;
162 gpmc,we-on-ns = <0>;
163 gpmc,we-off-ns = <42>;
/arch/x86/lib/
Dcmpxchg16b_emu.S34 # Emulate 'cmpxchg16b %gs:(%rsi)' except we return the result in %al not
37 # Note that this is only useful for a cpuops operation. Meaning that we
Dcmpxchg8b_emu.S29 # Emulate 'cmpxchg8b (%esi)' on UP except we don't
/arch/arm/lib/
Ddiv64.S56 @ See if we need to handle upper 32-bit result.
95 @ See if we need to handle lower 32-bit result.
103 @ Here we shift remainer bits leftwards rather than moving the
118 @ Otherwise, if lower part is also null then we are done.
127 clz xh, xl @ we know xh is zero here so...
143 @ If no bit position left then we are done.
/arch/cris/arch-v10/kernel/
Dentry.S96 ;; we cannot simply test $dccr, because that does not necessarily
97 ;; reflect what mode we'll return into.
119 ;; Since we dont really want to have two epilogues (one for system calls
120 ;; and one for interrupts) we push the contents of BRP instead of IRP in the
124 ;; Since we can't have system calls inside interrupts, it should not matter
127 ;; In r9 we have the wanted syscall number. Arguments come in r10,r11,r12,r13,mof,srp
208 ;; now we have a 4-word SBFS frame which we do not want to restore
209 ;; using RBF since it was not stacked with SBFS. instead we would like to
285 ;; we need to restore $r9 here to contain the wanted syscall, and
307 push $srp ; we keep the old/new PC on the stack
[all …]
/arch/frv/mm/
Dtlb-flush.S69 # now, we assume that the TLB line step is page size in size
99 # specify the context we want to flush
110 # now, we assume that the TLB line step is page size in size
139 # specify the context we want to flush
167 # specify the context we want to flush
Dtlb-miss.S51 # see if we're supposed to re-enable single-step mode upon return
96 # see if we're supposed to re-enable single-step mode upon return
172 # we're using IAMR1 as an extra TLB entry
216 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more
304 # - need to check IAMR1 lest we cause an multiple-DAT-hit exception
345 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more
463 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more
583 # the PTE we want wasn't in the PTD we have mapped, so we need to go looking for a more
620 # we can now resume normal service
/arch/cris/arch-v10/lib/
Dchecksum.S16 ;; we also do _NOT_ want to compute a checksum over more than the
23 ;; need to save the registers we use below in the movem loop
24 ;; this overhead is why we have a check above for breakeven length
106 ;; see if we have one odd byte more
Dchecksumcopy.S20 ;; we also do _NOT_ want to compute a checksum over more than the
27 ;; need to save the registers we use below in the movem loop
28 ;; this overhead is why we have a check above for breakeven length
112 ;; see if we have one odd byte more
/arch/arm/vfp/
Dvfphw.S97 @ On UP, we lazily save the VFP context. As a different
102 @ exceptions, so we can get at the
123 @ For SMP, if this thread does not own the hw context, then we
125 @ we always save the state when we switch away from a thread.
/arch/xtensa/lib/
Dstrnlen_user.S58 addi a4, a2, -4 # because we overincrement at the end;
59 # we compensate with load offsets of 4
101 # Actually, we don't need to check. Zero or nonzero, we'll add one.
102 # Do not add an extra one for the NULL terminator since we have
109 # NOTE that in several places below, we point to the byte just after
/arch/mn10300/lib/
Dmemset.S45 # we want to transfer as much as we can in chunks of 32 bytes
91 # check we set the correct amount
/arch/powerpc/boot/dts/
Dps3.dts34 * so we'll put a null entry here.
46 * we'll put a null entries here. These will be initialized after
51 * here so we can bring up both of ours. See smp_setup_cpu_maps().
/arch/arm/boot/compressed/
Dhead-sa1100.S23 @ UNTIL we've something like an open bootldr

12345678910