Searched refs:AR_RTC_9160_PLL_DIV (Results 1 – 3 of 3) sorted by relevance
901 pll |= SM(0x50, AR_RTC_9160_PLL_DIV); in ar9160_hw_compute_pll_control()903 pll |= SM(0x58, AR_RTC_9160_PLL_DIV); in ar9160_hw_compute_pll_control()
466 pll |= SM(pll_div, AR_RTC_9160_PLL_DIV); in ar9002_hw_compute_pll_control()
1221 #define AR_RTC_9160_PLL_DIV 0x000003ff macro