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Searched refs:AR_SREV_9280_20_OR_LATER (Results 1 – 11 of 11) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dar9002_hw.c52 } else if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_mode_regs()
77 if (!AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_mode_regs()
220 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_configpcipowersave()
420 if (AR_SREV_9280_20_OR_LATER(ah)) in ar9002_hw_attach_ops()
Deeprom_def.c483 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_gain()
510 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_gain()
571 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_board_values()
625 if (!AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_def_set_board_values()
642 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_board_values()
671 if (AR_SREV_9280_20_OR_LATER(ah) && in ath9k_hw_def_set_board_values()
768 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_change_gain_boundary_setting()
807 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_adjust_pdadc_values()
1247 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_txpower()
Dar5008_phy.c143 BUG_ON(AR_SREV_9280_20_OR_LATER(ah)); in ar5008_hw_force_bias()
468 if (AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_rf_alloc_ext_banks()
506 if (AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_set_rf_regs()
612 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar5008_hw_override_ini()
627 if (AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_override_ini()
813 if (!AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_set_rfmode()
Dhw.c661 if (AR_SREV_9280_20_OR_LATER(ah) && !AR_SREV_9300_20_OR_LATER(ah)) in __ath9k_hw_init()
1686 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_init_mfp()
1938 if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_reset()
2447 else if (!AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_fill_cap_info()
2498 else if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_fill_cap_info()
2607 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_fill_cap_info()
2641 if (AR_SREV_9280_20_OR_LATER(ah) in ath9k_hw_gpio_cfg_output_mux()
2697 else if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_gpio_get()
3243 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_name()
Dar9002_calib.c828 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_cal()
851 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_cal()
962 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_cal_settings()
Dwow.c281 if (AR_SREV_9280_20_OR_LATER(ah) && ah->is_pciexpress) in ath9k_hw_wow_wakeup()
Dbtcoex.c117 } else if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_btcoex_init_scheme()
Deeprom.c506 if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_get_gain_boundaries_pdadcs()
Deeprom.h103 #define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \
Dinit.c280 if (AR_SREV_9280_20_OR_LATER(ah)) { in setup_ht_cap()
Dreg.h835 #define AR_SREV_9280_20_OR_LATER(_ah) \ macro