Searched refs:BIT9 (Results 1 – 20 of 20) sorted by relevance
233 #define IMR_BDOK BIT9254 #define TPPoll_StopBK BIT9384 #define RRSR_36M BIT9
47 #define BIT9 0x00000200 macro162 #define WLAN_GET_FC_FROMDS(n) ((((unsigned short)(n) << 8) & (BIT9)) >> 9)195 #define WLAN_GET_FC_FROMDS(n) ((((unsigned short)(n)) & (BIT9)) >> 9)
45 #define WLAN_RATE_36M BIT9
2404 (Key_info & BIT8) && (Key_info & BIT9)) { //send 2/2 key in device_xmit()
41 #define BIT9 0x00000200 macro159 #define WLAN_GET_FC_FROMDS(n) ((((u16)(n) << 8) & (BIT9)) >> 9)193 #define WLAN_GET_FC_FROMDS(n) ((((u16)(n)) & (BIT9)) >> 9)
43 #define WLAN_RATE_36M BIT9
2530 (Key_info & BIT8) && (Key_info & BIT9)) { //send 2/2 key in nsDMA_tx_packet()2542 (Key_info & BIT8) && (Key_info & BIT9)) { in nsDMA_tx_packet()
182 #define BIT9 0x00000200 macro215 #define SRB_XFERPAD BIT9
66 #define BIT9 0x00000200 macro
316 #define RRSR_36M BIT9
60 #define BIT9 0x00000200 macro107 #define COMP_POWER_TRACKING BIT9 //FOR 8190 TX POWER TRACKING
32 #define BIT9 0x00000200 macro
451 …RF_WriteReg(dev, 0x0f, (priv->XtalCal_Xin<<5) | (priv->XtalCal_Xout<<1) | BIT11 | BIT9); mdelay(1); in ZEBRA_Config_85BASIC_HardCode()453 (priv->XtalCal_Xin<<5) | (priv->XtalCal_Xout<<1) | BIT11 | BIT9); in ZEBRA_Config_85BASIC_HardCode()
564 #define MISCSTATUS_DSR_LATCHED BIT9587 #define SICR_DSR_ACTIVE BIT9589 #define SICR_DSR (BIT9+BIT8)1598 usc_OutDmaReg( info, CDIR, BIT9+BIT1 ); in mgsl_isr_receive_dma()1707 else if ( (DmaVector&(BIT10|BIT9)) == BIT10) in mgsl_interrupt()4774 RegValue |= BIT9; in usc_set_sdlc_mode()4776 RegValue |= ( BIT12 | BIT10 | BIT9 ); in usc_set_sdlc_mode()4849 RegValue |= BIT9 + BIT8; in usc_set_sdlc_mode()4851 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8); in usc_set_sdlc_mode()5020 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT9; break; in usc_set_sdlc_mode()[all …]
417 #define IRQ_RXIDLE BIT9 /* HDLC */418 #define IRQ_RXBREAK BIT9 /* async */4169 val |= BIT9; in async_mode()4209 val |= BIT9; in async_mode()4332 case HDLC_CRC_16_CCITT: val |= BIT9; break; in sync_mode()4333 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()4405 case HDLC_CRC_16_CCITT: val |= BIT9; break; in sync_mode()4406 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()5049 if (!(*(src+1) & (BIT9 + BIT8))) { in loopback_test_rx()
13 #define BIT9 0x00000200 macro
33 #define BIT9 0x00000200 macro
392 #define RRSR_36M BIT9
680 #define LPFC_SLI4_INTR9 BIT9
296 #define IRQ_TXREPEAT BIT9 // tx message repeat