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Searched refs:CACHE_MODE_1 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_pm.c3802 I915_WRITE(CACHE_MODE_1, in haswell_init_clock_gating()
3910 I915_WRITE(CACHE_MODE_1, in ivybridge_init_clock_gating()
4011 I915_WRITE(CACHE_MODE_1, in valleyview_init_clock_gating()
Di915_reg.h712 #define CACHE_MODE_1 0x7004 /* IVB+ */ macro