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Searched refs:DPLL_CTRL (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/gma500/
Doaktrail_hdmi.c73 #define DPLL_CTRL 0x6000 macro
297 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
299 REG_WRITE(DPLL_CTRL, dpll | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_mode_set()
313 dpll = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_mode_set()
316 REG_WRITE(DPLL_CTRL, 0x00000008); in oaktrail_crtc_hdmi_mode_set()
319 REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN)); in oaktrail_crtc_hdmi_mode_set()
424 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
426 REG_WRITE(DPLL_CTRL, temp | (DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
438 temp = REG_READ(DPLL_CTRL); in oaktrail_crtc_hdmi_dpms()
440 REG_WRITE(DPLL_CTRL, temp & ~(DPLL_PWRDN | DPLL_RESET)); in oaktrail_crtc_hdmi_dpms()
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