Searched refs:DPLL_VGA_MODE_DIS (Results 1 – 6 of 6) sorted by relevance
271 REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS); in cdv_dpll_set_clock_cdv()1120 dpll = DPLL_VGA_MODE_DIS; in cdv_intel_crtc_mode_set()1183 REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE); in cdv_intel_crtc_mode_set()
437 dpll |= DPLL_VGA_MODE_DIS; in oaktrail_crtc_mode_set()
244 #define DPLL_VGA_MODE_DIS (1 << 28) macro
532 dpll = DPLL_VGA_MODE_DIS; in psb_intel_crtc_mode_set()
4251 dpll = DPLL_VGA_MODE_DIS; in vlv_update_pll()4351 dpll = DPLL_VGA_MODE_DIS; in i9xx_update_pll()4458 dpll = DPLL_VGA_MODE_DIS; in i8xx_update_pll()
954 #define DPLL_VGA_MODE_DIS (1 << 28) macro