Searched refs:DP_TP_CTL_ENABLE (Results 1 – 2 of 2) sorted by relevance
204 DP_TP_CTL_ENABLE); in hsw_fdi_link_train()247 DP_TP_CTL_ENABLE); in hsw_fdi_link_train()259 temp &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK); in hsw_fdi_link_train()1290 val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK); in intel_ddi_post_disable()1408 if (I915_READ(DP_TP_CTL(port)) & DP_TP_CTL_ENABLE) { in intel_ddi_prepare_link_retrain()1417 val &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK); in intel_ddi_prepare_link_retrain()1426 val = DP_TP_CTL_ENABLE | DP_TP_CTL_MODE_SST | in intel_ddi_prepare_link_retrain()
4613 #define DP_TP_CTL_ENABLE (1<<31) macro