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Searched refs:DSPFW3 (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_device.c190 regs->saveDSPFW3 = PSB_RVDC32(DSPFW3); in psb_save_display_registers()
228 PSB_WVDC32(regs->saveDSPFW3, DSPFW3); in psb_restore_display_registers()
Doaktrail_device.c198 regs->psb.saveDSPFW3 = PSB_RVDC32(DSPFW3); in oaktrail_save_display_registers()
312 PSB_WVDC32(regs->psb.saveDSPFW3, DSPFW3); in oaktrail_restore_display_registers()
Dcdv_device.c279 regs->cdv.saveDSPFW[2] = REG_READ(DSPFW3); in cdv_save_display_registers()
349 REG_WRITE(DSPFW3, regs->cdv.saveDSPFW[2]); in cdv_restore_display_registers()
Doaktrail_crtc.c262 REG_WRITE(DSPFW3, 0x0); in oaktrail_crtc_dpms()
Dpsb_intel_reg.h624 #define DSPFW3 0x7003c macro
Dcdv_intel_display.c767 REG_WRITE(DSPFW3, 0x36000000); in cdv_intel_update_watermark()
795 REG_WRITE(DSPFW3, 0x24000000); in cdv_intel_update_watermark()
/drivers/gpu/drm/i915/
Dintel_pm.c715 I915_WRITE(DSPFW3, I915_READ(DSPFW3) & ~PINEVIEW_SELF_REFRESH_EN); in pineview_disable_cxsr()
1050 reg = I915_READ(DSPFW3); in pineview_update_wm()
1053 I915_WRITE(DSPFW3, reg); in pineview_update_wm()
1059 reg = I915_READ(DSPFW3); in pineview_update_wm()
1062 I915_WRITE(DSPFW3, reg); in pineview_update_wm()
1068 reg = I915_READ(DSPFW3); in pineview_update_wm()
1071 I915_WRITE(DSPFW3, reg); in pineview_update_wm()
1075 I915_WRITE(DSPFW3, in pineview_update_wm()
1076 I915_READ(DSPFW3) | PINEVIEW_SELF_REFRESH_EN); in pineview_update_wm()
1347 I915_WRITE(DSPFW3, in valleyview_update_wm()
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Di915_debugfs.c1307 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; in i915_sr_status()
Di915_reg.h2830 #define DSPFW3 (dev_priv->info->display_mmio_offset + 0x7003c) macro