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Searched refs:DUMPREG (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/exynos/
Dexynos_hdmi.c408 #define DUMPREG(reg_id) \ in hdmi_v13_regs_dump() macro
412 DUMPREG(HDMI_INTC_FLAG); in hdmi_v13_regs_dump()
413 DUMPREG(HDMI_INTC_CON); in hdmi_v13_regs_dump()
414 DUMPREG(HDMI_HPD_STATUS); in hdmi_v13_regs_dump()
415 DUMPREG(HDMI_V13_PHY_RSTOUT); in hdmi_v13_regs_dump()
416 DUMPREG(HDMI_V13_PHY_VPLL); in hdmi_v13_regs_dump()
417 DUMPREG(HDMI_V13_PHY_CMU); in hdmi_v13_regs_dump()
418 DUMPREG(HDMI_V13_CORE_RSTOUT); in hdmi_v13_regs_dump()
421 DUMPREG(HDMI_CON_0); in hdmi_v13_regs_dump()
422 DUMPREG(HDMI_CON_1); in hdmi_v13_regs_dump()
[all …]
Dexynos_mixer.c177 #define DUMPREG(reg_id) \ in mixer_regs_dump() macro
183 DUMPREG(MXR_STATUS); in mixer_regs_dump()
184 DUMPREG(MXR_CFG); in mixer_regs_dump()
185 DUMPREG(MXR_INT_EN); in mixer_regs_dump()
186 DUMPREG(MXR_INT_STATUS); in mixer_regs_dump()
188 DUMPREG(MXR_LAYER_CFG); in mixer_regs_dump()
189 DUMPREG(MXR_VIDEO_CFG); in mixer_regs_dump()
191 DUMPREG(MXR_GRAPHIC0_CFG); in mixer_regs_dump()
192 DUMPREG(MXR_GRAPHIC0_BASE); in mixer_regs_dump()
193 DUMPREG(MXR_GRAPHIC0_SPAN); in mixer_regs_dump()
[all …]
/drivers/media/platform/s5p-tv/
Dhdmi_drv.c293 #define DUMPREG(reg_id) \ in hdmi_dumpregs() macro
298 DUMPREG(HDMI_INTC_FLAG); in hdmi_dumpregs()
299 DUMPREG(HDMI_INTC_CON); in hdmi_dumpregs()
300 DUMPREG(HDMI_HPD_STATUS); in hdmi_dumpregs()
301 DUMPREG(HDMI_PHY_RSTOUT); in hdmi_dumpregs()
302 DUMPREG(HDMI_PHY_VPLL); in hdmi_dumpregs()
303 DUMPREG(HDMI_PHY_CMU); in hdmi_dumpregs()
304 DUMPREG(HDMI_CORE_RSTOUT); in hdmi_dumpregs()
307 DUMPREG(HDMI_CON_0); in hdmi_dumpregs()
308 DUMPREG(HDMI_CON_1); in hdmi_dumpregs()
[all …]
Dmixer_reg.c482 #define DUMPREG(reg_id) \ in mxr_reg_mxr_dump() macro
488 DUMPREG(MXR_STATUS); in mxr_reg_mxr_dump()
489 DUMPREG(MXR_CFG); in mxr_reg_mxr_dump()
490 DUMPREG(MXR_INT_EN); in mxr_reg_mxr_dump()
491 DUMPREG(MXR_INT_STATUS); in mxr_reg_mxr_dump()
493 DUMPREG(MXR_LAYER_CFG); in mxr_reg_mxr_dump()
494 DUMPREG(MXR_VIDEO_CFG); in mxr_reg_mxr_dump()
496 DUMPREG(MXR_GRAPHIC0_CFG); in mxr_reg_mxr_dump()
497 DUMPREG(MXR_GRAPHIC0_BASE); in mxr_reg_mxr_dump()
498 DUMPREG(MXR_GRAPHIC0_SPAN); in mxr_reg_mxr_dump()
[all …]
/drivers/video/omap2/dss/
Dvenc.c658 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, venc_read_reg(r)) in venc_dump_regs() macro
663 DUMPREG(VENC_F_CONTROL); in venc_dump_regs()
664 DUMPREG(VENC_VIDOUT_CTRL); in venc_dump_regs()
665 DUMPREG(VENC_SYNC_CTRL); in venc_dump_regs()
666 DUMPREG(VENC_LLEN); in venc_dump_regs()
667 DUMPREG(VENC_FLENS); in venc_dump_regs()
668 DUMPREG(VENC_HFLTR_CTRL); in venc_dump_regs()
669 DUMPREG(VENC_CC_CARR_WSS_CARR); in venc_dump_regs()
670 DUMPREG(VENC_C_PHASE); in venc_dump_regs()
671 DUMPREG(VENC_GAIN_U); in venc_dump_regs()
[all …]
Drfbi.c815 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r)) in rfbi_dump_regs() macro
820 DUMPREG(RFBI_REVISION); in rfbi_dump_regs()
821 DUMPREG(RFBI_SYSCONFIG); in rfbi_dump_regs()
822 DUMPREG(RFBI_SYSSTATUS); in rfbi_dump_regs()
823 DUMPREG(RFBI_CONTROL); in rfbi_dump_regs()
824 DUMPREG(RFBI_PIXEL_CNT); in rfbi_dump_regs()
825 DUMPREG(RFBI_LINE_NUMBER); in rfbi_dump_regs()
826 DUMPREG(RFBI_CMD); in rfbi_dump_regs()
827 DUMPREG(RFBI_PARAM); in rfbi_dump_regs()
828 DUMPREG(RFBI_DATA); in rfbi_dump_regs()
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Ddispc.c3193 #define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r)) in dispc_dump_regs() macro
3199 DUMPREG(DISPC_REVISION); in dispc_dump_regs()
3200 DUMPREG(DISPC_SYSCONFIG); in dispc_dump_regs()
3201 DUMPREG(DISPC_SYSSTATUS); in dispc_dump_regs()
3202 DUMPREG(DISPC_IRQSTATUS); in dispc_dump_regs()
3203 DUMPREG(DISPC_IRQENABLE); in dispc_dump_regs()
3204 DUMPREG(DISPC_CONTROL); in dispc_dump_regs()
3205 DUMPREG(DISPC_CONFIG); in dispc_dump_regs()
3206 DUMPREG(DISPC_CAPABLE); in dispc_dump_regs()
3207 DUMPREG(DISPC_LINE_STATUS); in dispc_dump_regs()
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Ddsi.c1864 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r)) in dsi_dump_dsidev_regs() macro
1870 DUMPREG(DSI_REVISION); in dsi_dump_dsidev_regs()
1871 DUMPREG(DSI_SYSCONFIG); in dsi_dump_dsidev_regs()
1872 DUMPREG(DSI_SYSSTATUS); in dsi_dump_dsidev_regs()
1873 DUMPREG(DSI_IRQSTATUS); in dsi_dump_dsidev_regs()
1874 DUMPREG(DSI_IRQENABLE); in dsi_dump_dsidev_regs()
1875 DUMPREG(DSI_CTRL); in dsi_dump_dsidev_regs()
1876 DUMPREG(DSI_COMPLEXIO_CFG1); in dsi_dump_dsidev_regs()
1877 DUMPREG(DSI_COMPLEXIO_IRQ_STATUS); in dsi_dump_dsidev_regs()
1878 DUMPREG(DSI_COMPLEXIO_IRQ_ENABLE); in dsi_dump_dsidev_regs()
[all …]
Dti_hdmi_4xxx_ip.c858 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r,\ in ti_hdmi_4xxx_wp_dump() macro
861 DUMPREG(HDMI_WP_REVISION); in ti_hdmi_4xxx_wp_dump()
862 DUMPREG(HDMI_WP_SYSCONFIG); in ti_hdmi_4xxx_wp_dump()
863 DUMPREG(HDMI_WP_IRQSTATUS_RAW); in ti_hdmi_4xxx_wp_dump()
864 DUMPREG(HDMI_WP_IRQSTATUS); in ti_hdmi_4xxx_wp_dump()
865 DUMPREG(HDMI_WP_PWR_CTRL); in ti_hdmi_4xxx_wp_dump()
866 DUMPREG(HDMI_WP_IRQENABLE_SET); in ti_hdmi_4xxx_wp_dump()
867 DUMPREG(HDMI_WP_VIDEO_CFG); in ti_hdmi_4xxx_wp_dump()
868 DUMPREG(HDMI_WP_VIDEO_SIZE); in ti_hdmi_4xxx_wp_dump()
869 DUMPREG(HDMI_WP_VIDEO_TIMING_H); in ti_hdmi_4xxx_wp_dump()
[all …]
Ddss.c302 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r)) in dss_dump_regs() macro
307 DUMPREG(DSS_REVISION); in dss_dump_regs()
308 DUMPREG(DSS_SYSCONFIG); in dss_dump_regs()
309 DUMPREG(DSS_SYSSTATUS); in dss_dump_regs()
310 DUMPREG(DSS_CONTROL); in dss_dump_regs()
314 DUMPREG(DSS_SDI_CONTROL); in dss_dump_regs()
315 DUMPREG(DSS_PLL_CONTROL); in dss_dump_regs()
316 DUMPREG(DSS_SDI_STATUS); in dss_dump_regs()
320 #undef DUMPREG in dss_dump_regs()