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Searched refs:GEN7_L3CNTLREG1 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_pm.c3782 I915_WRITE(GEN7_L3CNTLREG1, in haswell_init_clock_gating()
3858 I915_WRITE(GEN7_L3CNTLREG1, in ivybridge_init_clock_gating()
3954 I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS); in valleyview_init_clock_gating()
Di915_reg.h3583 #define GEN7_L3CNTLREG1 0xB01C macro