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Searched refs:GEN7_MISCCPCTL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/
Di915_sysfs.c132 misccpctl = I915_READ(GEN7_MISCCPCTL); in i915_l3_read()
133 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in i915_l3_read()
138 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in i915_l3_read()
Di915_irq.c516 misccpctl = I915_READ(GEN7_MISCCPCTL); in ivybridge_parity_work()
517 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in ivybridge_parity_work()
518 POSTING_READ(GEN7_MISCCPCTL); in ivybridge_parity_work()
529 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in ivybridge_parity_work()
Di915_gem.c3896 misccpctl = I915_READ(GEN7_MISCCPCTL); in i915_gem_l3_remap()
3897 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in i915_gem_l3_remap()
3898 POSTING_READ(GEN7_MISCCPCTL); in i915_gem_l3_remap()
3913 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in i915_gem_l3_remap()
Di915_reg.h4417 #define GEN7_MISCCPCTL (0x9424) macro