Searched refs:GMBUS0 (Results 1 – 4 of 4) sorted by relevance
65 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0); in intel_i2c_reset()410 I915_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()450 I915_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()481 I915_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()492 I915_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
885 #define GMBUS0 0x5100 /* clock/port select */ macro
74 REG_WRITE(GMBUS0, 0); in gma_intel_i2c_reset()263 REG_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()342 REG_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()348 REG_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
46 #define GMBUS0 0x5100 /* clock/port select */ macro